AD9396

The AD9396 offers designers the flexibility of an analog interface and digital visual interface (DVI) receiver integrated on a single chip. Also included is support for high bandwidth digital content protection (HDCP).

The AD9396 is a complete 8-bit, 150 MSPS monolithic analog interface optimized for capturing component video (YPbPr) and RGB graphics signals. Its 150 MSPS encode rate capability and full power analog bandwidth of 330 MHz supports all HDTV formats (up to 1080p and 720p) and FPD resolutions up to SXGA (1280 × 1024 @ 80 Hz).

The analog interface includes a 150 MHz triple ADC with internal 1.25 V reference, a phase-locked loop (PLL), program-mable gain, offset, and clamp control. The user provides only 1.8 V and 3.3 V power supply, analog input, and HSYNC. Three-state CMOS outputs may be powered from 1.8 V to 3.3V. The on-chip PLL generates a pixel clock from HSYNC. Pixel clock output frequencies range from 12 MHz to 150 MHz. PLL clock jitter is typically less than 700 ps p-p at 150 MHz. The AD9396 also offers full sync processing for composite sync and sync-on-green (SOG) applications.

The AD9396 contains a DVI-compatible receiver and supports all HDTV formats (up to 1080p and 720p) and display resolutions up to SXGA (1280 × 1024 @ 80 Hz). The receiver features an intrapair skew tolerance of up to one full clock cycle. With the inclusion of HDCP, displays may now receive encrypted video content. The AD9396 allows for authentication of a video receiver, decryption of encoded data at the receiver, and renewability of that authentication during transmission as specified by the HDCP 1.1 protocol.

Fabricated in an advanced CMOS process, the AD9396 is pro-vided in a space-saving, 100-lead, surface-mount, Pb-free plastic LQFP and is specified over the 0ºC to 70ºC temperature range.