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MFG:ATMEL  D/C:O9+  

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Part Number: AT17LV010A

 

MFG: ATMEL

 

D/C: O9+

Description: The AT17C512/010A and AT17LV512/010A (AT17A Series) FPGA Configuration EEPROMs (Configurators) provide and easy-to-use,...


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AT17LV010A General Description


The AT17C512/010A and AT17LV512/010A (AT17A Series) FPGA Configuration EEPROMs (Configurators) provide and easy-to-use, cost-effective configuration memory for programming Altera FLEX Field Programmable Gate Arrays, FPGA, (the "devices"). The AT17A Series is packaged in the popular 20-pin PLCC package. The AT17A Series family uses a simple serial-access procedure to configure one or more FPGA devices. The AT17A Series organization supplies enough memory to configure one or multiple smaller FPGAs. Using a special feature of the AT17A Series, the user can select the polarity of the reset function by programming an EEPROM byte. The AT17C/LV512/010A parts generate their own internal clock and can be used as a system"master" for loading the FPGA devices.

The Atmel devices also supports a system friendly READY pin and a write protect mechanism. The READY pin is used to simplify system power-up considerations. The WP1 pin is used to protect part of the device memory during in-system programming.

The AT17A Series can be programmed with industry standard programmers.

AT17LV010A Maximum Ratings

Operating Temperature......................... -55°C to +125°C
Storage Temperature ........................... -65°C to +150°C
Voltage on Any Pin
with Respect to Ground .........................-0.1V to VCC +0.5V
Supply Voltage (VCC) ....................................-0.5V to +7.0V
Maximum Soldering Temp. (10 sec. @ 1/16 in.).........260°C
ESD (RZAP = 1.5K, CZAP = 100 pF) ........................... 2000V

AT17LV010A Features

• Serial EEPROM Family for Configuring Altera FLEX® 10K Devices
• Simple, Easy-to-use 4-pin Interface
• E2 Programmable 1M Bit Serial Memories Designed To Store Configuration Programs For Programmable Gate Arrays
• Cascadable To Support Additional Configurations or Future Higher-density Arrays
• Low-power CMOS EEPROM Process
• Programmable Reset Polarity
• Available in the Space-efficient Surface-mount PLCC Package
• In-System Programmable Via 2-Wire Bus
• Emulation of 24CXX Serial EPROMs
• Available in 3.3V ± 10% LV and 5V ± 5% C Versions

AT17LV010A Connection Diagram

AT17LV010A Connection DiagramAT17LV010A Connection Diagram

AT17LV010A datasheet

AT17LV010A
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