BCM54981

Description

The BCM54981 consists of eight complete 10/100/1000BASE-T Gigabit Ethernet transceivers integrated on a single monolithic CMOS chip. The BCM54981 is optimized for low power and small footprint size to enable high-port density applications. By lowering system cost and reducing power dissipation by nearly 15% compared to previous generation PHY products, the BCM54981 enables a new class of cost-effective Gigabit Ethernet equipment, driving the delivery of Gigabit Ethernet bandwidth to the desktop.

The BCM54981 DSP-based architecture and advanced power management techniques combine with enhanced analog front-end design to achieve robust and low-power operation over existing Category 5 twisted-pair wiring. The BCM54981 architecture not only meets the requirements of IEEE 802.3, IEEE 802.3u, and IEEE 802.3ab but also maintains the industry's highest level of margin over IEEE requirements for echo, near-end crosstalk (NEXT), and far-end crosstalk (FEXT). Low power is the key to implementing high-density Gigabit Ethernet switches, and at less than 500 mW per port the BCM54981 has the smallest footprint and lowest power in the industry.