CD4035BM

Counter Type :
Output Type :
Package / Case : SOIC-16
Number of Circuits : 1
Maximum Operating Temperature : + 125 C
Minimum Operating Temperature : - 55 C
Logic Type : CMOS
Packaging : Tube
Counting Sequence : Serial/Parallel to Parallel
Number of Input Lines : 6
Logic Family : CD4000
Propagation Delay Time : 500 ns, 200 ns, 150 ns


Features:

`Wide supply voltage range 3.0V to 15V
`High noise immunity0.45 V_DD (typ.)
`Low power TTL Fan out of 2 driving 74L compatibility or 1 driving 74LS
`4-stage clocked operation
`Synchronous parallel entry on all 4 stages
`JK inputs on first stage
`Asynchronous true/complement control on all outputs
`Reset control
`Static flip-flop operation; master/slave configuration
`Buffered outputs
`Low power dissipation 5 W (typ.) (ceramic)
`High speed to 5 MHz


Application

·Automotive
·Alarm systems
·Data terminals
·Industrial controls
·Instrumentation
·Remote metering
·Medical electronics
·Computers


Specifications

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.
DC Supply Voltage (V_DD)                          -0.5V to a18V
Input Voltage (V_IN)                          -0.5V to VDD a0.5V
Storage Temperature Range (T_S)         -65 to a150
Power Dissipation (P_D)
Dual-In-Line                                                      700 mW
Small Outline                                                     500 mW
Lead Temperature (T_L)
(Soldering, 10 seconds)                                        260



Description

The CD4035B 4-bit parallel-in/parallel-out shift register is a monolithic complementary MOS (CMOS) integrated circuit constructed with P- and N-channel enhancement mode transistors. This CD4035B shift register is a 4-stage clocked serial register having provisions for synchronous parallel inputs to each stage and serial inputs to the first stage via JK logic. Register stages 2, 3, and 4 are coupled in a serial "D" flipflop configuration when the register is in the serial mode (parallel/serial control low).

Parallel entry via the "D" line of each register stage is permitted only when the parallel/serial control is "high". In the parallel or serial mode, CD4035B information is transferred on positive clock transitions.

When the true/complement control is "high", the true contents of the register are available at the output terminals. When the true/complement control is "low", the CD4035B outputs are the complements of the data in the register. The true/complement control functions asynchronously with respect to the clock signal.

CD4035B JK input logic is provided on the first stage serial input to minimize logic requirements particularly in counting and sequence- generation applications. With JK inputs connected together, the first stage becomes a "D" flip-flop. An asynchronous common reset is also provided.

Parameters:

Technical/Catalog Information	CD4035BM
Vendor	Texas Instruments
Category	Integrated Circuits (ICs)
Logic Type	Shift Register
Function	Parallel or Serial to Serial
Number of Elements	1 - Single
Number of Bits per Element	4
Output Type	Differential
Voltage - Supply	3 V ~ 18 V
Mounting Type	Surface Mount
Package / Case	16-SOIC (3.9mm Width)
Packaging	Tube
Operating Temperature	-55°C ~ 125°C
Drawing Number	296; 4040047-4; D; 16
Lead Free Status	Lead Free
RoHS Status	RoHS Compliant
Other Names	CD4035BM CD4035BM