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Part Number: CY7C1006D

 

MFG: CYPRESS

 

D/C: 08+

Description: The CY7C106D and CY7C1006D are high-performance CMOS static RAMs organized as 262,144 words by 4 bits....


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CY7C1006D General Description


The CY7C106D and CY7C1006D are high-performance CMOS static RAMs organized as 262,144 words by 4 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and tri-state drivers. These devices have an automatic power-down feature that reduces power consumption by more than 65% when the devices are deselected.

Writing to the devices is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the four I/O pins (I/O0 through I/O3) is then written into the location specified on the address pins (A0 through A17).

Reading from the devices is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing Write Enable (WE) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the four I/O pins.

The four input/output pins (I/O0 through I/O3) are placed in a high-impedance state when the devices are deselected (CE HIGH), the outputs are disabled (OE HIGH), or during a write operation (CE and WE LOW).

The CY7C106D is available in a standard 400-mil-wide Pb-Free SOJ; the CY7C1006D is available in a standard 300-mil-wide Pb-Free SOJ.

CY7C1006D Maximum Ratings

(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature .............................65°C to +150°C
Ambient Temperature with
Power Applied.........................................55°C to +125°C
Supply Voltage on VCC Relative to GND[2] ....0.5V to +7.0V
DC Voltage Applied to Outputs
in High-Z State[2] ................................0.5V to VCC + 0.5V
DC Input Voltage[2]..............................0.5V to VCC + 0.5V
Current into Outputs (LOW)........................................ 20 mA
Static Discharge Voltage ..........................................> 2001V
(per MIL-STD-883, Method 3015)
Latch-up Current....................................................> 200 mA

CY7C1006D Features

• Pin- and function-compatible with CY7C106B/CY7C1006B
• High speed
- tAA = 10 ns
• CMOS for optimum speed/power
• Low active power
- ICC = 60 mA @ 10 ns
• Low CMOS standby power
- ISB2 = 3.0 mA
• Data Retention at 2.0V
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Available in Pb-Free packages

CY7C1006D Connection Diagram

CY7C1006D  Connection Diagram

CY7C1006D datasheet

CY7C1006D
PDF/DataSheet Download

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