CY7C185A

The CY7C185A is a high-performance CMOS static RAM organized as 8192 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE₁), an active HIGH Chip Enable (CE₂), an active LOW Output Enable (OE), and three-state drivers. The CY7C185 has an automatic power-down feature (CE1), reducing the power consumption by over 70% when deselected. The CY7C185A is in the standard 300-mil-wide DIP package and leadless chip carrier.

Writing to the device is accomplished when the Chip Enable one (CE₁) and Write Enable (WE) inputs are both LOW, and the Chip Enable two (CE₂) input is HIGH.

Data on the eight I/O pins (I/O0 through I/O7) of CY7C185 is written into the memory location specified on the address pins (A₀ through A₁₂).

Reading the CY7C185 is accomplished by taking Chip Enable one (CE₁) and Output Enable (OE) LOW, while taking Write Enable (WE) and Chip Enable two (CE₂) HIGH. Under these conditions, the contents of the memory location specified on the address pins will appear on the I/O pins.

The I/O pins of CY7C185 remain in a high-impedance state when Chip Enable one (CE₁) or Output Enable (OE) is HIGH, or Write Enable (WE) or Chip Enable two (CE₂) is LOW.

A die coat is used to ensure alpha immunity.