CY7C185D

The CY7C185D is a high-performance CMOS static RAM organized as 8192 words by 8 bits. Easy memory expansion is provided by an active LOW chip enable (CE₁), an active HIGH chip enable (CE₂), and active LOW output enable (OE) and three-state drivers. This device has an automatic power-down feature (CE₁ or CE₂), reducing the power consumption when deselected.

An active LOW write enable signal (WE) controls the writing/reading operation of the memory. When CE₁ and WE inputs are both LOW and CE₂ is HIGH, data on the eight data input/output pins (I/O0 through I/O7) is written into the memory location addressed by the address present on the address pins (A₀ through A₁₂). Reading the device is accomplished by selecting the device and enabling the outputs, CE₁ and OE active LOW, CE₂ active HIGH, while WE remains inactive or HIGH. Under these conditions, the contents of the location addressed by the information on address pins are present on the eight data input/output pins.

The input/output pins remain in a high-impedance state unless the chip is selected, outputs are enabled, and write enable (WE) is HIGH.The CY7C185D is in a standard 28-pin 300-mil-wide DIP, SOJ, or SOIC Pb-Free package.