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CY7C187A

Features: • High speed -20 ns• CMOS for optimum speed/power• Low active power -495 mW• Low standby power -220 mW• TTl-compatible inputs and outputs• Automatic power-down when deselectedPinoutSpecifications(Above which the useful life may be impaired. For user gu...

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SeekIC No. : 004320243 Detail

CY7C187A: Features: • High speed -20 ns• CMOS for optimum speed/power• Low active power -495 mW• Low standby power -220 mW• TTl-compatible inputs and outputs• Automatic pow...

CY7C187A Data Sheet

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Part Number:
CY7C187A
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• High speed
   -20 ns
• CMOS for optimum speed/power
• Low active power
   -495 mW
• Low standby power
   -220 mW
• TTl-compatible inputs and outputs
• Automatic power-down when deselected


Pinout

Connection Diagram


Specifications

(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ..................................65°C to+150°C
Ambient Temperature with
Power Applied..............................................55°C to+125°C
Supply Voltage to Ground Potential
(Pin 22 to Pin 11) ............................................0.5V to+7.0V
DC Voltage Applied to Outputs
in High Z State[2] .............................................0.5V to+7.0V
DC Input Voltage[2] .........................................0.5V to +7.0V
Output Current into Outputs (LOW) ............................. 20 mA
Static Discharge Voltage ........................................... >2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current..................................................... >200 mA


Description

The CY7C187A is a high-performance CMOS static RAM organized as 65,536 words by 1 bit. Easy memory expansion is provided by an active LOW chip enable (CE) and three-state drivers. The CY7C187A has an automatic power-down feature, reducing the power consumption by 55% when deselected.

Writing to the CY7C187A  is accomplished when the chip enable (CE) and write enable (WE) inputs are both LOW. Data on the input pin (DI) is written into the memory location specified on the address pins (A0 through A15).

Reading the CY7C187A  is accomplished by taking the chip enable (CE) LOW, while write enable (WE) remains HIGH. Under these conditions, the contents of the memory location specified on the address pins will appear on the data output (DO) pin.

The output pin of CY7C187A stays in high-impedance state when chip enable (CE) is HIGH or write enable (WE) is LOW.

The 7C187A utilizes a die coat to insure alpha immunity.




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