CY7C346

Features: * 128 macrocells in eight logic array blocks (LABs)* 20 dedicated inputs, up to 64 bidirectional I/O pins* Programmable interconnect array* 0.8-micron double-metal CMOS EPROM technology* Available in 84-pin CLCC, PLCC, and 100-pin PGA, PQFPPinoutSpecifications(Above which the useful life...

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SeekIC No. : 004320316 Detail

CY7C346: Features: * 128 macrocells in eight logic array blocks (LABs)* 20 dedicated inputs, up to 64 bidirectional I/O pins* Programmable interconnect array* 0.8-micron double-metal CMOS EPROM technology* A...

floor Price/Ceiling Price

Part Number:
CY7C346
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/30

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Product Details

Description



Features:

* 128 macrocells in eight logic array blocks (LABs)
* 20 dedicated inputs, up to 64 bidirectional I/O pins
* Programmable interconnect array
* 0.8-micron double-metal CMOS EPROM technology
* Available in 84-pin CLCC, PLCC, and 100-pin PGA,  PQFP



Pinout

  Connection Diagram


Specifications

(Above which the useful life may be impaired. For user guide- lines, not tested.)
Storage Temperature ......................................65°C to+150°C
Ambient Temperature with
Power Applied..................................................55°C to+125°C
Maximum Junction Temperature
(under bias)........................................................................150°C
Supply Voltage to Ground Potential.......................2.0V to +7.0V
Maximum Power Dissipation............................................2500 mW
DC VCC  or GND Current.....................................................500 mA
DC[1] Output Current per Pin...........................25 mA to +25 mA
DC Input Voltage ..................................................3.0V to +7.0V
DC Program Voltage..............................................................13.0V
Static Discharge Voltage...................................................> 1100V
(per MIL-STD-883, Method 3015)



Description

The CY7C346 is an Erasable Programmable Logic Device (EPLD) in which CMOS EPROM cells are used to configure logic functions within the device. The MAX  architecture is 100% user-configurable, allowing the CY7C346  to accommodate a variety of independent logic functions. The 128 macrocells in the CY7C346 are divided into eight LABs, 16 per LAB. There are 256 expander product terms, 32 per LAB, to be used and shared by the macrocells within each LAB.

Each LAB is interconnected through the programmable inter- connect array, allowing all signals to be routed throughout the chip.

The speed and density of the CY7C346 allow it to be used in a wide range of applications, from replacement of large amounts of 7400-series TTL logic, to complex controllers and multifunction chips. With greater than 25 times the functionality of 20-pin PLDs, the CY7C346 allows the replacement of over 50 TTL devices. By replacing large amounts of logic, the CY7C346 reduces board space, part count, and increases system reliability.


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