Features: • 5V Operation• Full duplex asynchronous receiver and transmitter• Easily interfaces to most popular microprocessors• Adds or deletes standard asynchronous communication bits (start, stop, and parity ) to or from a serial data stream• Independently controlle...
Ei16C450: Features: • 5V Operation• Full duplex asynchronous receiver and transmitter• Easily interfaces to most popular microprocessors• Adds or deletes standard asynchronous communic...
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• 5V Operation
• Full duplex asynchronous receiver and transmitter
• Easily interfaces to most popular microprocessors
• Adds or deletes standard asynchronous communication bits (start, stop, and parity ) to or from a serial data stream
• Independently controlled transmitter, receiver, line status, and data set interrupts
• Programmable baud rate generator allows division of any input clock by 1 to (216-1) and generates the internal 16 x clock
• Independent receiver clock input
• MODEM control functions (CTS, RTS, DSR, DTR, RI, and DCD)
• Fully programmable serial interface characteris tics:
- 5, 6, 7, or 8 bit characters
- Even, odd, or no-parity bit generation and detection
- 1, 1.5, or 2 stop bit generation
- Baud generation (DC to 56k baud)
• False start bit detection
• Complete status reporting capabilities
• Tri-State® TTL drive capabilities for bi-direc tional data bus and control bus
• Line break generation and detection
• Internal diagnostic capabilities:
- Loopback controls for communications link fault isolation
- Break, parity overrun, and framing error simulation
• Fully prioritized interrupt systems controls
The Epic Ei16C450 Universal Asynchronous Receiver Transmitter (UART) is a CMOS-VLSI communication device in a single package.
The UART performs serial to parallel conversion on data characters received from a peripheral device or a MODEM, and parallel-to-serial conversions on data characters received from the CPU. The CPU Ei16C450 can read the complete status of the UART at any time during the functional operation. Status information reported includes the type and condition of the transfer operation being performed by the UART, as well as any error conditions (parity, overrun, framing, or break detect).