MFG:FAIRCHILD Package Cooled:SOT-363 D/C:05+
MFG: FAIRCHILD
Package Cooled: SOT-363
D/C: 05+
Description: These dual P-Channel logic level enhancement mode MOSFET are produced using Fairchild Semiconductor's ...
These dual P-Channel logic level enhancement mode MOSFET are produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimize on-state resistance. This device has been designed especially for low voltage applications as a replacement for bipolar digital transistors and small signal MOSFETS.
|
Symbol |
Parameter |
Ratings |
Units |
| VDSS | Drain-Source Voltage |
-20 |
V |
| VGS | Gate-Source Voltage |
±12 |
V |
| ID | Drain Current Continuous (Note 1) Pulsed |
-0.5 |
A
|
|
-1.8 | |||
| PD | Power Dissipation for Single Operation (Note 1) |
0.3 |
W |
| TJ, TSTG | Operating and Storage Temperature |
-55 to 175 |
Notes:
1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RJA is determined by the user's board design. RJA = 415°C/W when mounted on a minimum pad .
FDG6318P
PDF/DataSheet Download
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