Purchase GAL20LV8ZD, In-stock GAL20LV8ZD From SeekIC.
Part Number: GAL20LV8ZD
Description: The GAL20LV8ZD, at 100 µA standby current and 15ns propagation delay provides the highest speed ...
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GAL20LV8ZD
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DataSheet
General Description
GAL20LV8ZD General Description
The GAL20LV8ZD, at 100 µA standby current and 15ns propagation delay provides the highest speed low-voltage PLD available in the market. The GAL20LV8ZD is manufactured using Lattice Semiconductor's advanced 3.3V E2 CMOS process, which com- bines CMOS with Electrically Erasable (E2 ) floating gate technology.
The GAL20LV8ZD utilizes a dedicated power-down pin (DPP) to put the device into standby mode. It has 19 inputs available to the AND array and is capable of interfacing with both 3.3V and stan- dard 5V devices.
Unique test circuitry and reprogrammable cells allow complete AC, DC, and functional testing during manufacture. As a result, Lattice Semiconductor delivers 100% field programmability and functionality of all GAL products. In addition, 100 erase/write cycles and data retention in excess of 20 years are specified.
GAL20LV8ZD Maximum Ratings
Supply voltage VCC .................................... -0.5 to +5.6V
Input voltage applied ................................. -0.5 to +5.6V
Off-state output voltage applied ................ -0.5 to +5.6V
Storage Temperature ................................... -65 to 150
Ambient Temperature with
Power Applied .............................................. -55 to 125
1. Stresses above those listed under the "Absolute Maximum Ratings"
may cause permanent damage to the device. These are stress only
ratings and functional operation of the device at these or at any
other conditions above those indicated in the operational sections of
this specification is not implied (while programming, follow the
programming specifications).
Input voltage applied ................................. -0.5 to +5.6V
Off-state output voltage applied ................ -0.5 to +5.6V
Storage Temperature ................................... -65 to 150
Ambient Temperature with
Power Applied .............................................. -55 to 125
1. Stresses above those listed under the "Absolute Maximum Ratings"
may cause permanent damage to the device. These are stress only
ratings and functional operation of the device at these or at any
other conditions above those indicated in the operational sections of
this specification is not implied (while programming, follow the
programming specifications).
GAL20LV8ZD Features
• 3.3V LOW VOLTAGE, ZERO POWER OPERATION
- JEDEC Compatible 3.3V Interface Standard
- Interfaces with Standard 5V TTL Devices
-50µA Typical Standby Current (100µA Max.)
- 45mA Typical Active Current (55mA Max.)
- Dedicated Power-down Pin
• HIGH PERFORMANCE E2 CMOS TECHNOLOGY
- TTL Compatible Balanced 8 mA Output Drive
- 15 ns Maximum Propagation Delay
- Fmax = 62.5 MHz
- 10 ns Maximum from Clock Input to Data Output
- UltraMOS® Advanced CMOS Technology
• E2CELL TECHNOLOGY
- Reconfigurable Logic
- Reprogrammable Cells
- 100% Tested/100% Yields
- High Speed Electrical Erasure (<100ms)
- 20 Year Data Retention
• EIGHT OUTPUT LOGIC MACROCELLS
- Maximum Flexibility for Complex Logic Designs
- Programmable Output Polarity
• PRELOAD AND POWER-ON RESET OF ALL REGISTERS
- 100% Functional Testability
• APPLICATIONS INCLUDE:
- Glue Logic for 3.3V Systems
- Ideal for Mixed 3.3V and 5V Systems
• ELECTRONIC SIGNATURE FOR IDENTIFICATION
- JEDEC Compatible 3.3V Interface Standard
- Interfaces with Standard 5V TTL Devices
-50µA Typical Standby Current (100µA Max.)
- 45mA Typical Active Current (55mA Max.)
- Dedicated Power-down Pin
• HIGH PERFORMANCE E2 CMOS TECHNOLOGY
- TTL Compatible Balanced 8 mA Output Drive
- 15 ns Maximum Propagation Delay
- Fmax = 62.5 MHz
- 10 ns Maximum from Clock Input to Data Output
- UltraMOS® Advanced CMOS Technology
• E2CELL TECHNOLOGY
- Reconfigurable Logic
- Reprogrammable Cells
- 100% Tested/100% Yields
- High Speed Electrical Erasure (<100ms)
- 20 Year Data Retention
• EIGHT OUTPUT LOGIC MACROCELLS
- Maximum Flexibility for Complex Logic Designs
- Programmable Output Polarity
• PRELOAD AND POWER-ON RESET OF ALL REGISTERS
- 100% Functional Testability
• APPLICATIONS INCLUDE:
- Glue Logic for 3.3V Systems
- Ideal for Mixed 3.3V and 5V Systems
• ELECTRONIC SIGNATURE FOR IDENTIFICATION
GAL20LV8ZD Connection Diagram
GAL20LV8ZD
PDF/DataSheet Download
- Datasheet: GAL20LV8ZD
- File Size: 291705 KB
- Manufacturer: LATTICE [Lattice Semiconductor]
- Click here to Download
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