GS9000C

Features: •fully compatible with SMPTE 259M• decodes 8 and 10 bit serial digital signals for data rates to 370Mb/s•pin and function compatible with GS9000S, GS9000 and GS9000B•325mW power dissipation at 270MHz clock rates•incorporates an automatic standards selectionf...

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GS9000C Picture
SeekIC No. : 004356291 Detail

GS9000C: Features: •fully compatible with SMPTE 259M• decodes 8 and 10 bit serial digital signals for data rates to 370Mb/s•pin and function compatible with GS9000S, GS9000 and GS9000B̶...

floor Price/Ceiling Price

Part Number:
GS9000C
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/3/27

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Product Details

Description



Features:

•fully compatible with SMPTE 259M
• decodes 8 and 10 bit serial digital signals for data rates to 370Mb/s
•pin and function compatible with GS9000S, GS9000 and GS9000B
•325mW power dissipation at 270MHz clock rates
•incorporates an automatic standards selection
function with the GS9005A Receiver or GS9015A Reclocker
•operates from single +5 or -5 volt supply
•enables an adjustment-free Deserializer system
when used with GS9010A and GS9005A or GS9015A
•28 pin PLCC packaging





Application

• 4ƒSC, 4:2:2 and 360Mb/s serial digital interfaces
• Automatic standards select controller for serial routing
and distribution applications using GS9005A Receiver or GS9015A Reclocker





Pinout

  Connection Diagram




Specifications

PARAMETER VALUE
Supply Voltage (VS=VCC-VEE) 7V
Input Voltage Range (any input) -0.3V to (VCC+0.3)V
DC Input Current (any one input) ±10µA
Operating Temperature Range 0°C to 70°C
Storage Temperature Range -65°C to +150°C
Lead Temperature (soldering, 10 sec) 260°C





Description


The GS9000C is a CMOS integrated circuit specifically designed to deserialize SMPTE 259M serial digital signals at data rates to 370Mb/s.

The GS9000C incorporates a descrambler, serial to parallel convertor, sync processing unit, sync warning unit and automatic standards select circuitry.

Differential pseudo-ECL inputs of GS9000C for both serial clock and data are internally level shifted to CMOS levels. Digital outputs such as parallel data, parallel clock, HSYNC, Sync Warning and Standard Select are all TTL compatible.

The GS9000C is designed to directly interface with the GS9005A Reclocking Receiver to form a complete SMPTE-serial-in to CMOS level parallel-out deserializer. It may also be used with the GS9010A and the GS9005A to form an adjustment-free receiving system which automatically adapts to all serial digital data rates. The GS9015A can replace the GS9005A in GS9000C applications where cable equalization is not required.

The GS9000C is packaged in a 28 pin PLCC and operates from a single 5 volt, ±5% power supply.







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