Purchase H8S2639, In-stock H8S2639 From SeekIC.
Part Number: H8S2639
Description: The H8S/2600 CPU is a high-speed central processing unit with an internal 32-bit architecture that is ...
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H8S2639
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General Description
H8S2639 General Description
The H8S/2600 CPU is a high-speed central processing unit with an internal 32-bit architecture that is upward-compatible with the H8/300 and H8/300H CPUs. The H8S/2600 CPU has sixteen 16-bit general registers, can address a 16-Mbyte (architecturally 4-Gbyte) linear address space, and is ideal for realtime control.
H8S2639 Maximum Ratings
| Item | Symbol | Value | Unit |
| Power supply voltage | VCC | 0.3 to +7.0 | V |
| Input voltage (OSC1, OSC2) | Vin | 0.3 +4.3 | V |
| Input voltage (XTAL, EXTAL) | Vin | 0.3 to VCC +0.3 | V |
| Input voltage (ports 4 and 9) | Vin | 0.3 to AVCC +0.3 | V |
| Input voltage (ports H and J) | Vin | 0.3 to PWMVCC +0.3 | V |
| Input voltage (except XTAL, EXTAL, OSC1, OSC2, ports 4, 9, H and J) |
Vin | 0.3 to VCC +0.3 | V |
| Reference power supply voltage | AVref | 0.3 to AVCC + 0.3 | V |
| Analog power supply voltage | AVCC | 0.3 to +7.0 | V |
| Analog input voltage | VAN | 0.3 to AVCC + 0.3 | V |
| Operating temperature | Topr | Regular specifications: 20 to +75 | |
| Wide-range specifications: 40 to +85 | |||
| Storage temperature | Tstg | 55 to +125 |
H8S2639 Features
The H8S/2600 CPU has the following features.
• Upward-compatible with H8/300 and H8/300H CPUs
Can execute H8/300 and H8/300H object programs
• General-register architecture
Sixteen 16-bit general registers (also usable as sixteen 8-bit registers or eight 32-bit
registers)
• Sixty-nine basic instructions
8/16/32-bit arithmetic and logic instructions
Multiply and divide instructions
Powerful bit-manipulation instructions
Multiply-and-accumulate instruction
• Eight addressing modes
Register direct [Rn]
Register indirect [@ERn]
Register indirect with displacement [@(d:16,ERn) or @(d:32,ERn)]
Register indirect with post-increment or pre-decrement [@ERn+ or @ERn]
Absolute address [@aa:8, @aa:16, @aa:24, or @aa:32]
Immediate [#xx:8, #xx:16, or #xx:32]
Program-counter relative [@(d:8,PC) or @(d:16,PC)]
Memory indirect [@@aa:8]
• 16-Mbyte address space
Program: 16 Mbytes
Data: 16 Mbytes (4 Gbytes architecturally)
• High-speed operation
All frequently-used instructions execute in one or two states
Maximum clock rate : 20 MHz
8/16/32-bit register-register add/subtract : 50 ns
8 * 8-bit register-register multiply : 150 ns
16 ÷ 8-bit register-register divide : 600 ns
16 * 16-bit register-register multiply : 200 ns
32 ÷ 16-bit register-register divide : 1000 ns
• Two CPU operating modes
Normal mode*
Advanced mode
Note: * Not available in the chip.
• Power-down state
Transition to power-down state by SLEEP instruction
CPU clock speed selection
• Upward-compatible with H8/300 and H8/300H CPUs
Can execute H8/300 and H8/300H object programs
• General-register architecture
Sixteen 16-bit general registers (also usable as sixteen 8-bit registers or eight 32-bit
registers)
• Sixty-nine basic instructions
8/16/32-bit arithmetic and logic instructions
Multiply and divide instructions
Powerful bit-manipulation instructions
Multiply-and-accumulate instruction
• Eight addressing modes
Register direct [Rn]
Register indirect [@ERn]
Register indirect with displacement [@(d:16,ERn) or @(d:32,ERn)]
Register indirect with post-increment or pre-decrement [@ERn+ or @ERn]
Absolute address [@aa:8, @aa:16, @aa:24, or @aa:32]
Immediate [#xx:8, #xx:16, or #xx:32]
Program-counter relative [@(d:8,PC) or @(d:16,PC)]
Memory indirect [@@aa:8]
• 16-Mbyte address space
Program: 16 Mbytes
Data: 16 Mbytes (4 Gbytes architecturally)
• High-speed operation
All frequently-used instructions execute in one or two states
Maximum clock rate : 20 MHz
8/16/32-bit register-register add/subtract : 50 ns
8 * 8-bit register-register multiply : 150 ns
16 ÷ 8-bit register-register divide : 600 ns
16 * 16-bit register-register multiply : 200 ns
32 ÷ 16-bit register-register divide : 1000 ns
• Two CPU operating modes
Normal mode*
Advanced mode
Note: * Not available in the chip.
• Power-down state
Transition to power-down state by SLEEP instruction
CPU clock speed selection
H8S2639 Connection Diagram
H8S/2140BF-ZTAT
PDF/DataSheet Download
- Datasheet: H8S/2140BF-ZTAT
- File Size: 4419711 KB
- Manufacturer: RENESAS [Renesas Technology Corp]
- Click here to Download
- ·H8S/2141BF-ZTAT
- RENESAS [Renesas Technology Corp]
- Hitachi 16-Bit Single-Chip Microcomputer
- 4419711 KB
- ·H8S/2145BF-ZTAT
- RENESAS [Renesas Technology Corp]
- Hitachi 16-Bit Single-Chip Microcomputer
- 4419711 KB
- ·H8S/2148BF-ZTAT
- RENESAS [Renesas Technology Corp]
- Hitachi 16-Bit Single-Chip Microcomputer
- 4419711 KB
- ·H8S/2149
- RENESAS [Renesas Technology Corp]
- Hitachi 16-Bit Single-Chip Microcomputer
- 4284164 KB
- ·H8S/2149F-ZTAT
- RENESAS [Renesas Technology Corp]
- Hitachi 16-Bit Single-Chip Microcomputer
- 4284164 KB
- ·H8S/2160B
- RENESAS [Renesas Technology Corp]
- Hitachi 16-Bit Single-Chip Microcomputer
- 4419711 KB
- ·H8S/2161B
- RENESAS [Renesas Technology Corp]
- Hitachi 16-Bit Single-Chip Microcomputer
- 4419711 KB
- ·H8S/2166
- RENESAS [Renesas Technology Corp]
- Renesas 16-Bit Single-Chip Microcomputer
- 5049770 KB
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