HI5805

Features: • Sampling Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . .5MSPS• Low Power• Internal Sample and Hold• Fully Differential Architecture• Full Power Input Bandwidth . . . . . . . . . . . . . . . . . 100MHz• Low Distortion• Internal Volt...

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HI5805 Picture
SeekIC No. : 004362454 Detail

HI5805: Features: • Sampling Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . .5MSPS• Low Power• Internal Sample and Hold• Fully Differential Architecture• Full Power...

floor Price/Ceiling Price

Part Number:
HI5805
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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268 Transactions

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Upload time: 2024/4/29

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Product Details

Description



Features:

• Sampling Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . .5MSPS
• Low Power
• Internal Sample and Hold
• Fully Differential Architecture
• Full Power Input Bandwidth . . . . . . . . . . . . . . . . . 100MHz
• Low Distortion
• Internal Voltage Reference
• TTL/CMOS Compatible Digital I/O
• Digital Outputs . . . . . . . . . . . . . . . . . . . . . . . . . 5V to 3.0V





Application

• Digital Communication Systems
• Undersampling Digital IF
• Document Scanners
• Additional Reference Documents
- AN9214 Using Intersil High Speed A/D Converters
- AN9707 Using the HI5805EVAL1 Evaluation Board





Pinout

  Connection Diagram




Specifications

Supply Voltage, AVCC or DVCC to AGND or DGND . . . . . . . . . . .+6.0V
DGND to AGND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.3V
Digital I/O Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .DGND to DVCC
Analog I/O Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AGND to AVCC





Description

The HI5805 is a monolithic, 12-bit, Analog-to-Digital Converter fabricated in Intersil's HBC10 BiCMOS process. It is designed for high speed, high resolution applications where wide bandwidth and low power consumption are essential.

The HI5805 is designed in a fully differential pipelined architecture with a front end differential-in-differential-out sample-and-hold (S/H). The HI5805 has excellent dynamic performane while consuming 300mW power at 5MSPS.The 100MHz full power input bandwidth is ideal for communication systems and document scanner applications. Data output latches are provided which present valid data to the output bus with a latency of 3 clock cycles. The digital outputs have a separate supply pin which can be powered from a 3.0V to 5.0V supply.




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