HM51258

      The HM51258 is the 262,144 word by 1 bit static column dynamic random access memory utilizing the Hitachi 2m CMOS process. This device has static column circuit and it is good for high performance main storage or for page access application. While the row circuitry is still dynamic , and it realizes very low power dissipation. Multiplexed address and the 16 pin pinout are compatible with the fully dynamic 256K DRAM HM50256.
      It has many unique festures. The first one is 262,144 word *1 bit SCRAM. The second one is double layer poly-si/policide process , high performance CMOS. The third one is power supply voltage which is 5 V ±10%. The forth one is access time : Row access time is 85/100/120/150ns; Address access time is 40/45/55/70ns. The fifth one is cycletime: Random read&Write cycle time is 155/180/210/250ns; Static column cycle time is 45/50/60/75ns. The sixth one is lower power: Standby is 11 mW; Active is 385/330/275/220mW. The seventh one is TTL compatible input and output. The eighth one is static column mode capability. The ninth one is edge triggered write capability. The tenth one is refresh which is 256 cycles/4ms, etc.
     There are some absolute maximum ratings about it. Voltage on any pin relative to VSS(VT) is -1.0 V to +7.0 v . Supply voltage relative to VSS(VCC) is -1.0 V to +7.0 V. Short circuit output current(Iout) is 50 mA. Power dissipation(PT) is 1.0 W. operating temperature (Topr) is 0 to + 70 . Storage temperature (Tstg) is -55 to +125 . Recommended DC operatinng conditions(Ta is 0 to +70 ): supply voltage(VCC) is 4.5 V min , 5.0 V typ and 5.5 V max.Input high voltage (VIH) is 2.4 V min and 6.5 V max.Input low voltage(VIL) is -1.0 V min and 0.8 V max.
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