HY628400

The HY628400 has the following features including High speed-55R01851100ns (max.);Fully static operation;No clock or refresh required;TTL compatible inputs and outputs;Tri-state output.

The HY628400 is a high-speed, low power and 524,288x8-bits CMOS static RAM fabricated using Hyundai's high performance twin tub CMOS process technology. This high reliability process coupled with innovative circuit design techniques, yields maximum access time of 55ns.The HY628400 has a data retention mode that guarantees data to remain valid at a minimum power supply voltage of 2.0 volt. Using CMOS technology, supply voltages from 2.0 to 5.5 volt have little effect on supply current in data retention mode. Reducing the supply voltage to minimize current drain is unnecessary with the HY828400 Series.Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational of this specification is not impilied.Exposure to absolute maximum rating conditions for extended period may affect reliability.

A write occurs during the overlap of a low CS and a low WE. A write begins at the latest transition among CS going iow, and WE going low:A write ends at the earlist transition among CS going hign WE going high. twp is measured from the beginning of write to the end of write.If OE and WE are in the read mode during this period, the I/0 pins are in the output low-Z state, inputs of opposite phase of the output must not be applied because bus contention can occur.If CS goes low simultaneously with WE going low or after WE going low, the outputs remain in high impedance state.This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any responsibility for use of circuits described. No patent licences are implied.