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IC41LV44002AS(L)

Features: ·Extended Data-Out (EDO) Page Mode access cycle·TTL compatible inputs and outputs·Refresh Interval:-- 2,048 cycles/32 ms·Refresh Mode:RAS -Only,CAS -before-RAS (CBR), and Hidden· JEDEC standard pinout· Single power supply:5V ± 10% or 3.3V ± 10%· Self Refresh 2048 cycles for S version· Lo...

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SeekIC No. : 004370366 Detail

IC41LV44002AS(L): Features: ·Extended Data-Out (EDO) Page Mode access cycle·TTL compatible inputs and outputs·Refresh Interval:-- 2,048 cycles/32 ms·Refresh Mode:RAS -Only,CAS -before-RAS (CBR), and Hidden· JEDEC sta...

IC41LV44002AS(L) Data Sheet

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Part Number:
IC41LV44002AS(L)
Supply Ability:
5000

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  • 1~5000
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  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

·Extended Data-Out (EDO) Page Mode access cycle
·TTL compatible inputs and outputs
·Refresh Interval:-- 2,048 cycles/32 ms
·Refresh Mode: RAS -Only,CAS -before-RAS  (CBR), and Hidden
· JEDEC standard pinout
· Single power supply:5V ± 10%  or  3.3V ± 10%
· Self Refresh 2048 cycles for S version
· Low power for L version.


Pinout

Connection Diagram


Specifications

Symbol Parameters Rating Unit
VT Voltage on Any Pin Relative to GND 5V
3.3V		 -1.0 to +7.0
-0.5 to +4.6		 V
VCC Supply Voltage 5V
3.3V		 -1.0 to +7.0
-0.5 to +4.6		 V
IOUT Output Current 50 mA
PD Power Dissipation 1 W
TA Commercial Operation Temperature 0 to +70
TSTG TA Commercial Operation Temperature -55 to +125  



Description

The IC41LV44002AS(L) Series is a 4,194,304 x 4-bit high-performance CMOS  Dynamic Random Access Memory.  These devices offer an accelerated cycle access called EDO Page Mode. EDO Page Mode allows 2,048 random accesses within a single row with access cycle time as short as 20 ns per 4-bit word.


These features make the IC41LV44002AS(L) Series ideally suited for high-bandwidth graphics, digital signal processing, high-performance computing systems, and peripheral applications.


The IC41LV44002AS(L) Series is packaged in a 24-pin 300mil SOJ and a 24 pin TSOP-2




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