Purchase IDT70V19L, In-stock IDT70V19L From SeekIC.
Part Number: IDT70V19L
Description: The IDT70V19 is a high-speed 128K x 9 Dual-Port Static RAM. The IDT70V19 is designed to be used as a s...
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IDT70V19L
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DataSheet
General Description
IDT70V19L General Description
The IDT70V19 is a high-speed 128K x 9 Dual-Port Static RAM. The IDT70V19 is designed to be used as a stand-alone 1152K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 18-bit-or-more word system. Using the IDT MASTER/SLAVE Dual- Port RAM approach in 18-bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic.
This device provides two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each port to enter a very low standby power mode.
Fabricated using IDT's CMOS high-performance technology, these devices typically operate on only 440mW of power. The IDT70V19 is packaged in a 100-pin Thin Quad Flatpack (TQFP).
IDT70V19L Maximum Ratings
|
Symbol |
Rating |
Commercial
& Industrial |
Unit |
|
VTERM |
Terminal Voltage with respect to GND |
-0.5 to +4.6 |
V |
|
VTER(2) |
Terminal Voltage |
-55 to +125 |
°C |
|
TSTG |
Temperature Under Bias |
-65 to +150
|
°C |
|
IOUT |
DC Output Current |
50
|
mA |
NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. VTERM must not exceed Vcc + 0.3V for more than 25% of the cycle time or 10ns maximum, and is limited to < 20mA for the period of VTERM > Vcc + 0.3V.
IDT70V19L Features
M/S = VIH for BUSY output flag on Master, M/S = VIL for BUSY input on Slave
Busy and Interrupt Flags
On-chip port arbitration logic
Full on-chip hardware support of semaphore signaling between ports
Fully asynchronous operation from either port
LVTTL-compatible, single 3.3V (±0.3V) power supply
Available in a 100-pin TQFP
Industrial temperature range (40°C to +85°C) is available for selected speeds
True Dual-Ported memory cells which allow simultaneous access of the same memory location
High-speed access
Commercial: 15/20ns (max.)
Industrial: 20ns (max.)
Low-power operation
IDT70V19L
Active: 440mW (typ.)
Standby: 660µW (typ.)
Dual chip enables allow for depth expansion without external logic
IDT70V19 easily expands data bus width to 18 bits or
more using the Master/Slave select when cascading more than one device
Busy and Interrupt Flags
On-chip port arbitration logic
Full on-chip hardware support of semaphore signaling between ports
Fully asynchronous operation from either port
LVTTL-compatible, single 3.3V (±0.3V) power supply
Available in a 100-pin TQFP
Industrial temperature range (40°C to +85°C) is available for selected speeds
True Dual-Ported memory cells which allow simultaneous access of the same memory location
High-speed access
Commercial: 15/20ns (max.)
Industrial: 20ns (max.)
Low-power operation
IDT70V19L
Active: 440mW (typ.)
Standby: 660µW (typ.)
Dual chip enables allow for depth expansion without external logic
IDT70V19 easily expands data bus width to 18 bits or
more using the Master/Slave select when cascading more than one device
IDT70V19L Connection Diagram
NOTES:
1. All Vcc pins must be connected to power supply.
2. All GND pins must be connected to ground.
3. Package body is approximately 14mm x 14mm x 1.4mm.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.
IDT70V19L
PDF/DataSheet Download
- Datasheet: IDT70V19L
- File Size: 149479 KB
- Manufacturer: IDT
- Click here to Download
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