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Part Number: IDT74ALVCH16952
Description: This 16-bit registered transceiver is built using advanced dual metal CMOS technology. The ALVCH16952 ...
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IDT74ALVCH16952
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General Description
IDT74ALVCH16952 General Description
This 16-bit registered transceiver is built using advanced dual metal CMOS technology. The ALVCH16952 contains two sets of D-type flip-flops for temporary storage of data flowing in either direction. This device can be used as two 8-bit transceivers or one 16-bit transceiver. Data on the A or B bus is stored in the registers on the low-to-high transition of the clock (CLKAB or CLKBA) input provided that the clock-enable (CLKENAB or CLKENBA) input is low. Taking the output-enable (OEAB or OEBA) input low accesses the data on either port.
The ALVCH16952 has been designed with a ±24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance.
The ALVCH16952 has "bus-hold" which retains the inputs' last state whenever the input bus goes to a high impedance. This prevents floating inputs and eliminates the need for pull-up/down resistors.
IDT74ALVCH16952 Maximum Ratings
|
Description |
Symbol |
Max |
unit |
|
Terminal Voltage with Respect to GND |
VTERM(2) |
0.5 to +4.6
|
V |
|
Terminal Voltage with Respect to GND |
VTERM(3)
|
0.5 to VCC+0.5 |
V |
|
Storage Temperature |
TSTG |
65 to +150
|
° C |
|
DC Output Current |
IOUT
|
50 to +50 |
mA |
|
Continuous Clamp Current, VI < 0 or VI > VCC |
IIK |
±50
|
mA |
|
Continuous Clamp Current, VO < 0 |
IOK |
50 |
mA |
|
Continuous Current through each VCC or GND |
ICC ISS |
±100 |
mA |
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. VCC terminals.
3. All terminals except VCC.
IDT74ALVCH16952 Features
• 0.5 MICRON CMOS Technology
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range
• VCC = 2.7V to 3.6V, Extended Range
• VCC = 2.5V ± 0.2V
• CMOS power levels (0.4µ W typ. static)
• Rail-to-Rail output swing for increased noise margin
• Available in SSOP, TSSOP, and TVSOP packages
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range
• VCC = 2.7V to 3.6V, Extended Range
• VCC = 2.5V ± 0.2V
• CMOS power levels (0.4µ W typ. static)
• Rail-to-Rail output swing for increased noise margin
• Available in SSOP, TSSOP, and TVSOP packages
IDT74ALVCH16952 Typical Application
• 3.3V high speed systems
• 3.3V and lower voltage computing systems
• 3.3V and lower voltage computing systems
IDT74ALVCH16952 Connection Diagram
IDT74ALVCH16952
PDF/DataSheet Download
- Datasheet: IDT74ALVCH16952
- File Size: 73407 KB
- Manufacturer: IDT
- Click here to Download
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