IR3Y48A1

The  IR3Y48A1  is  a  CMOS  single-chip  signal processing IC for CCD area sensors which includes correlated double sampling circuit (CDS), clamp circuit,  programmable  gain  amplifier  (PGA),reference voltage generator, black level detection circuit, 18 MHz 10-bit analog-to-digital converter(ADC),  timing  generator  for  internally  required pulses, and serial interface for internal function control and PGA gain control.

Features of the IR3Y48A1 are:(1)low power consumption : 80 mW (TYP.); (2)wide gain range : 1.94 to 36 dB(Gain step : 0.047 dB/step); (3)high speed sample-and-hold circuits :pulse width 11 ns (MIN.); (4)capable of independent input of ADC conversion clock and data output clock; (5)power down mode : less than 1 mW; (6)built-in serial interface ; (7)maximum input level of CCD signals : 1.1 Vp-p; (8)accepts a direct signal input to ADC or PGA(input level : 1.0 Vp-p (TYP.)); (9)single 2.7 to 3.6 V power supply.The IR3Y48A1 integrates an 18 MHz 10-bit full pipeline A/D converter (ADC).

The absolute maximum ratings of the IR3Y48A1 can be summarized as:(1)power supply voltage :-0.3 to +4.5 V; (2)voltage difference :0.3V; (3)power consumption :570mW; (4)storage temperature:-40 to +125°C.The IR3Y48A1 has the function that settles a black level at high speed. The function that increases a settling speed in a fixed period from the access to the serial interface can become available by the register setting. This function increases the gain of the settling DAC in a fixed period, and it increases the  charge/discharge  current  to  the  OBCAP capacitor.The internal registers of IR3Y48A1 are controlled by the 3-wire serial interface. The data is a 16-bit-length serial data that consists of a 2-bit operation code, a 4-bit address, and a 10-bit data. The each bit is fetched at the rising edge of the SCK input and the data is executed at the rising edge of the CSN input. When not access, make the CSN input high.