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Description: The KM23V8105D(G) is a fully static mask programmable ROM fabricated using silicon gate CMOS process t...


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KM23V8105D General Description


The KM23V8105D(G) is a fully static mask programmable ROM fabricated using silicon gate CMOS process technology, and is organized either as 1,048,576 x 8 bit(byte mode) or as 524,288 x 16 bit(word mode) depending on BHE voltage level.(See mode selection table)

This device includes PAGE read mode function, page readmode allows 4 words(or 8 bytes) of data to read fast in the   same page, CE and A2 ~ A18 should not be changed.

This device operates with 3.0V or 3.3V power supply, and all inputs and outputs are TTL compatible.

Because of its asynchronous operation, it requires no external clock assuring extremely easy operation.

It is suitable for use in program memory of microprocessor, and data memory, character generator.

The KM23V8105D is packaged in a 42-DIP and the KM23V8105DG in a 44-SOP.

KM23V8105D Maximum Ratings

Item
Symbol
Rating
Unit
Voltage on Any Pin Relative to VSS
VIN
-0.3 to +4.5
V
Temperature Under Bias
TBIAS
-10 to +85
Storage Temperature
TSTG
-55 to +150

KM23V8105D Features

· Switchable organization
   -1,048,576 x 8(byte mode)
   -524,288 x 16(word mode)
· Random access time/Page Access Time
   -3.3V Operation : 100/30ns(Max.)
   -3.0V Operation : 120/50ns(Max.)
· 4 Words / 8 bytes page access
· Supply voltage : single +3.0V/ single +3.3V
· Current consumption
   -Operating : 40mA(Max.)
   -Standby : 30mA(Max.)
· Fully static operation
· All inputs and outputs TTL compatible
· Three state outputs
· Package
   - KM23V8105D : 42-DIP-600
   - KM23V8105DG : 44-SOP-600

KM23V8105D Connection Diagram

KM23V8105D  Connection Diagram

KM23V8105D datasheet

KM23V8105D
PDF/DataSheet Download

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