LP62S1024B-T

Features:

· Power supply range: 2.7V to 3.6V
· Access times: 55/70 ns (max.)
· Current: Very low power version: Operating: 30mA(max.) Standby: 5uA (max.)
· Full static operation, no clock or refreshing required
· All inputs and outputs are directly TTL-compatible
· Common I/O using three-state output
· Output enable and two chip enable inputs for easy application
· Data retention voltage: 2V (min.)
· Available in 32-pin SOP, TSOP, TSSOP (8 X 13.4mm) forward type and 36-pin CSP packages




Pinout






Specifications

VCC to GND .............................................. -0.5V to +4.6V
IN, IN/OUT Volt to GND .....................-0.5V to VCC +0.5V
Operating Temperature, Topr ................... -25 to +85
Storage Temperature, Tstg..................... -55to +125
Temperature Under Bias, Tbias................ -10 to +85
Power Dissipation, P_T ...............................................0.7W




Description

·The LP62S1024B-T is a low operating current 1,048,576- bit static random access memory organized as 131,072 words by 8 bits and operates on a low power voltage: 2.7V to 3.6V. It is built using AMIC's high performance CMOS process.

·Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.

·Two chip enable inputs are provided for POWER-DOWN and device enable and an output enable input is included for easy interfacing.

·Data retention is guaranteed at a power supply voltage as low as 2V.