LU3X31T-T64

 Single-chip integrated physical layer and transceiver for 10Base-T and/or 100Base-T functions
 IEEE 802.3 compatible 10Base-T and 100Base-T physical layer interface and ANSI X3.263 TP-PMD compatible transceiver
  Built-in analog 10 Mbits/s receive filter, eliminating the need for external filters
  Built-in 10 Mbits/s transmit filter
  10 Mbits/s PLL exceeding tolerances for both preamble and data jitter
100 Mbits/s PLL, combined with the digital adaptive equalizer, robustly handles variations in risefall time, excessive attenuation due to channel loss, duty-cycle distortion, crosstalk, and baseline wander
 Transmit rise-fall time can be manipulated to provid ower emissions, amplitude fully compatible for proper interoperability
Programmable scrambler seed for better FCC compliancy
IEEE 802.3u Clause 28 compliant autonegotiation for full 10 Mbits/s and 100 Mbits/s control
Fully configurable via pins and management accesses
 Extended management support with interrupt capabilities
PHY MIB support
Symbol mode option
Low-power operation: <150 mA max
Low autonegotiation power: <30 mA
Very low powerdown mode: <5 mA
64-pin TQFP package (10 mm x 10 mm x 1.4 mm)100 Mbits/s PLL, combined with the digital adaptive equalizer, robustly handles variations in risefall time, excessive attenuation due to channel loss, duty-cycle distortion, crosstalk, and baseline wander
Transmit rise-fall time can be manipulated to provide lower emissions, amplitude fully compatible for proper interoperability
Programmable scrambler seed for better FCC compliancy
IEEE 802.3u Clause 28 compliant autonegotiation for full 10 Mbits/s and 100 Mbits/s control
Fully configurable via pins and management accesses
Extended management support with interrupt capabilities
PHY MIB support
Symbol mode option
Low-power operation: <150 mA max
Low autonegotiation power: <30 mA
Very low powerdown mode: <5 mA
64-pin TQFP package (10 mm x 10 mm x 1.4 mm)