Purchase M5M4V4S40CTP-15, In-stock M5M4V4S40CTP-15 From SeekIC.
Part Number: M5M4V4S40CTP-15
Description: The M5M4V4S40CTP is a 2-bank x 131,072-word x 16-bit Synchronous DRAM, with LVTTL interface. All input...
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M5M4V4S40CTP-15
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DataSheet
General Description
M5M4V4S40CTP-15 General Description
The M5M4V4S40CTP is a 2-bank x 131,072-word x 16-bit Synchronous DRAM, with LVTTL interface. All inputs and outputs are referenced to the rising edge of CLK. The M5M4V4S40CTP achieves very high speed data rates up to 83MHz, and is suitable for main memory or graphic memory in computer systems.
M5M4V4S40CTP-15 Maximum Ratings
|
Symbol |
Parameter |
Conditions |
Ratings |
Units |
|
Vdd |
Supply Voltage |
with respect to Vss |
-0.5 ~ 4.6 |
V |
|
VddQ |
Supply Voltage for Output |
with respect to VssQ |
-0.5 ~ 4.6 |
V |
|
VI |
Input Voltage |
with respect to Vss |
-0.5 ~ 5.5 |
V |
|
VO |
Output Voltage |
with respect to VssQ |
-0.5 ~ 4.6 |
V |
|
IO |
Output Current |
|
50 |
mA |
|
Pd |
Power Dissipation |
Ta = 25 °C |
1000 |
mW |
|
Topr |
Operating Temperature |
|
0 ~ 70 |
°C |
|
Tstg |
Storage Temperature |
|
-65 ~ 150 |
°C |
M5M4V4S40CTP-15 Features
- Single 3.3v±0.3v power supply
- Clock frequency 83MHz / 67MHz
- Fully synchronous operation referenced to clock rising edge
- Dual bank operation controlled by BA(Bank Address)
- /CAS latency- 1/2/3 (programmable)
- Burst length- 1/2/4/8/FP (programmable)
- Sequential and interleave burst (programmable)
- Byte control by DQMU and DQML
- Random column access
- Auto precharge / All bank precharge controlled by A8
- Auto and self refresh
- 1024 refresh cycles /16.4ms
- LVTTL Interface
- 400-mil, 50-pin Thin Small Outline Package (TSOP II) with 0.8mm lead pitch
- Clock frequency 83MHz / 67MHz
- Fully synchronous operation referenced to clock rising edge
- Dual bank operation controlled by BA(Bank Address)
- /CAS latency- 1/2/3 (programmable)
- Burst length- 1/2/4/8/FP (programmable)
- Sequential and interleave burst (programmable)
- Byte control by DQMU and DQML
- Random column access
- Auto precharge / All bank precharge controlled by A8
- Auto and self refresh
- 1024 refresh cycles /16.4ms
- LVTTL Interface
- 400-mil, 50-pin Thin Small Outline Package (TSOP II) with 0.8mm lead pitch
M5M4V4S40CTP-15 Connection Diagram
M5M4V4S40CTP-15
PDF/DataSheet Download
- Datasheet: M5M4V4S40CTP-15
- File Size: 1493689 KB
- Manufacturer: MITSUBISHI [Mitsubishi Electric Semiconductor]
- Click here to Download
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