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Part Number: M5M51008RV-55L
Description: The M5M51008BP,FP,VP,RV,KV,KR are a 1048576-bit CMOS static RAM organized as 131072 word by 8-bit whic...
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M5M51008RV-55L
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DataSheet
General Description
M5M51008RV-55L General Description
The M5M51008BP,FP,VP,RV,KV,KR are a 1048576-bit CMOS static RAM organized as 131072 word by 8-bit which are fabricated using high-performance triple polysilicon CMOS technology. The use of resistive load NMOS cells and CMOS periphery result in a high density and low power static RAM.
They are low standby current and low operation current and ideal for the battery back-up application.
The M5M51008BVP,RV,KV,KR are packaged in a 32-pin thin small outline package which is a high reliability and high density surface mount device(SMD).Two types of devices are available. VP,KV(normal lead bend type package),RV,KR(reverse lead bend type package). Using both types of devices, it becomes very easy to design a printed circuit board.
M5M51008RV-55L Maximum Ratings
|
Symbol |
Parameter |
Conditions |
Ratings |
Unit |
| Vcc |
Supply voltage | With respect to GND |
0.3*~7 |
V |
| VI |
Input voltage |
0.3* ~ Vcc + 0.3 |
V | |
| VO |
Output voltage |
0 ~ Vcc |
V | |
| Pd | Power dissipation | Ta=25°C |
700 |
mW |
| Topr | Operating temperature |
40 ~ 85 |
°C | |
| Tstg | Storage temperature |
65 ~ 150 |
°C |
M5M51008RV-55L Features
Single +5V power supply
Low stand-by current 0.3µA (typ.)
Directly TTL compatible : All inputs and outputs
Easy memory expansion and power down by S1,S2
Data hold on +2V power supply
Three-state outputs : OR - tie capability
OE prevents data contention in the I/O bus
Common data I/O
Package
M5M51008BP ```````````` 32pin 600mil DIP
M5M51008BFP ```````````` 32pin 525mil SOP
M5M51008BVP,RV ```````````` 32pin 8 X 20 mm2 TSOP
M5M51008BKV,KR ```````````` 32pin 8 X 13.4 mm2 TSOP
Low stand-by current 0.3µA (typ.)
Directly TTL compatible : All inputs and outputs
Easy memory expansion and power down by S1,S2
Data hold on +2V power supply
Three-state outputs : OR - tie capability
OE prevents data contention in the I/O bus
Common data I/O
Package
M5M51008BP ```````````` 32pin 600mil DIP
M5M51008BFP ```````````` 32pin 525mil SOP
M5M51008BVP,RV ```````````` 32pin 8 X 20 mm2 TSOP
M5M51008BKV,KR ```````````` 32pin 8 X 13.4 mm2 TSOP
M5M51008RV-55L Typical Application
Small capacity memory units
M5M51008RV-55L Connection Diagram
M5M51008RV-55L
PDF/DataSheet Download
- Datasheet: M5M51008RV-55L
- File Size: 63045 KB
- Manufacturer: MITSUBISHI [Mitsubishi Electric Semiconductor]
- Click here to Download
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The M5M51008CP,FP,VP,RV,KV,KR are a 1048576-bit CMOS static RAM organized as 131072 word by 8-bit which are fabricated using high-performance quadruple-polysilicon and double metal CMOS technology. The use of thin film transistor (TFT) load cells and CMOS pe...
M5M51008RV
The M5M51008RV is a 1048576-bit CMOS static RAM organized as 131072 word by 8-bit which is fabricated utilizing high-performance triple polysilicon CMOS technology. The use of resistive load NMOS cells and CMOS periphery result in a high density and low powe...
M5M51008RP
The M5M51008CP,FP,VP,RV,KV,KR are a 1048576-bit CMOS static RAM organized as 131072 word by 8-bit which are fabricated using high-performance quadruple-polysilicon and double metal CMOS technology. The use of thin film transistor TFT) load cells and CMOS per...
M5M51008KV
The M5M51008CP,FP,VP,RV,KV,KR are a 1048576-bit CMOS static RAM organized as 131072 word by 8-bit which are fabricated using high-performance quadruple-polysilicon and double metal CMOS technology. The use of thin film transistor TFT) load cells and CMOS per...
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The M5M51008CP,FP,VP,RV,KV,KR are a 1048576-bit CMOS static RAM organized as 131072 word by 8-bit which are fabricated using high-performance quadruple-polysilicon and double metal CMOS technology. The use of thin film transistor TFT) load cells and CMOS per...
M5M51008FP-55L
The M5M51008BP,FP,VP,RV,KV,KR are a 1048576-bit CMOS static RAM organized as 131072 word by 8-bit which are fabricated using high-performance triple polysilicon CMOS technology. The use of resistive load NMOS cells and CMOS periphery result in a high density...
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