MC100E142 General Description
MC100E142 Features
`700MHz Min. Shift Frequency
`9-Bit for Byte-Parity Applications
` Asynchronous Master Reset
` Dual Clocks
` Extended 100E VEE Range of 4.2V to 5.46V
` 75k Input Pulldown Resistors
The SEL (Select) input pin is used to switch between the two modes of operation - SHIFT and LOAD. The shift direction is from bit 0 to bit 8. Input data is accepted by the registers a set-up time before the positive going edge of CLK1 or CLK2; shifting is also accomplished on the positive clock edge. A HIGH on the Master Reset pin (MR) asynchronously resets all the resisters to zero.
MC100E142 Connection Diagram
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