MC100EP91

The MC100EP91 is a triple any level positive input to NECL output translator. The device accepts LVPECL, LVTTL, LVCMOS, HSTL, CML or LVDS signals, and translates them to differential NECL output signals (−3.0 V / −5.5 V).

To accomplish the level translation the EP91 requires three power rails. The V_CC pins should be connected to the positive power supply, and the V_EE pin should be connected to the negative power supply. The GND pins are connected to the system ground plane. Both V_EE and V_CC should be bypassed to ground via 0.01 F capacitors.

Under open input conditions, the D input will be biased at V_CC/2 and the D input will be pulled to GND. These conditions will force the Q outputs to a low state, and Q outputs to a high state, which will ensure stability.

The V_BB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to V_BB as a switching reference voltage. V_BB may also rebias AC coupled inputs. When used, decouple V_BB and V_CC via a 0.01 F capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, VBB should be left open.