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MFG:MOT  Package Cooled:991  D/C:87  

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Part Number: MC14050B

 

MFG: MOT

Package Cooled: 991

D/C: 87

Description: The MC14049B Hex Inverter/Buffer and MC14050B Noninverting Hex Buffer are constructed with MOS P-Channel and N-Channel ...


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MC14050B General Description


The MC14049B Hex Inverter/Buffer and MC14050B Noninverting Hex Buffer are constructed with MOS P-Channel and N-Channel enhancement mode devices in a single monolithic structure. These complementary MOS devices find primary use where low power dissipation and/or high noise immunity is desired. These devices provide logic level conversion using only one supply voltage, VDD.


The input-signal high level (VIH) can exceed the VDD supply voltage for logic level conversions. Two TTL/DTL loads can be driven when the devices are used as a CMOS-to-TTL/DTL converter (VDD = 5.0 V, VOL  0.4 V, IOL 3.2 mA).


Note that pins 13 and 16 are not connected internally on these devices; consequently connections to these terminals will not affect circuit operation.

MC14050B Maximum Ratings

Symbol Parameter Value Unit
VDD DC Supply Voltage Range 0.5 to +18.0 V
Vin Input Voltage Range (DC or Transient)  -0.5 to +18.0  
Vout
 Output Voltage Range (DC or Transient) 0.5 to VDD + 0.5 V
Iin   Input Current (DC or Transient) per Pin  ±10  
Iout
 Input or Output Current(DC or Transient)per Pin ±45 mA
PD Power Dissipation, per Package (Note 1)
(Plastic)
(SOIC)		 825
740		 mW
TA Ambient Temperature Range 55 to +125
Tstg Storage Temperature Range 65 to +150
TL Lead Temperature(8Second Soldering) 260

MC14050B Features

* High Source and Sink Currents
* High-to-Low Level Converter
* Supply Voltage Range = 3.0 V to 18 V
* VIN can exceed VDD
* Meets JEDEC B Specifications
* Improved ESD Protection On All Inputs
* Pb-Free Packages are Available*

MC14050B Connection Diagram

MC14050B Connection Diagram

MC14050B datasheet

MC14050B
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