MC146818A

The MC146818A real-time clock plus RAM is a peripheral device which includes the unique MOTEL concept for use with various microprocessors, microcomputers, and larger computers. This part combines three unique features: a complete time-of-day clock with alarm and one hundred year calendar, a programmable periodic interrupt and square-wave generator, and 50 bytes of low-power static RAM. The MC146818A uses high-speed CMOS technology to interface with 1 MHz processor buses, while consuming very little power.

The MC146818A has the following features include:(1)low-power, high-speed CMOS;(2)internal time base and oscillator;(3)counts seconds, minutes, and hours of the day;(4)counts days of the week, date, month, and year 3- to 6-volt operation;(5)time base input options: 4.194304 MHz, 1.048576 MHz, or 32.768 kHz;(6)time base oscillator for parallel resonant crystals;(7)binary or BCD representation of time, calendar, and alarm;(8)12-to 24-hour clock with AM and PM in 12-hour mode;(9)daylight savings time option;(10)automatic end of month recognition;(11)automatic leap year compensation;(12)microprocessor bus compatible;(13)selectable between motorola and competitor bus timing;(14)multiplexed bus for pin efficiency;(15)interfaced with software as 64 RAM locations;(16)14 bytes of clock and control registers;(17)50 bytes of general purpose RAM.

The absolute maximum ratings of the MC146818A are:(1)supply voltage:-0.3 to +8.0V;(2)storage temperature range:-55 to +150;(3)operating temperature range:-40 to +85;(4)all input voltage except OSC1:Vss-0.5 to Vdd+0.5V.Multiplexed bus processors save pins by presenting the address during the first portion of the bus cycle and using the same pins during the second portion for data.Address-then-data multiplexing does not slow the access time of the MC146818A since the bus reversal from address to data is occurring during the internal RAM access time.In most systems, the M(:14(itiltSA must conLnue to Keep time when system power is removed. In such systems, a conversion trorn system power to an alternate power supply,usually a battery, must be made. During the transition from system to battery power, the designer of a battery backed-up RTC system must protect data integrity,  minimize power cnnsumption, and ensure hardware reliability.