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Part Number: MC68HC908QY4A

 

 

 

 

 

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MC68HC908QY4A Maximum Ratings

Rating Symbol Value Unit
Supply voltage VDD 0.3 to +6.0 V
Input voltage VIn VSS 0.3 to VDD +0.3 V
Mode entry voltage, IRQ pin VTST VSS 0.3 to +9.1 V
Mode entry voltage, IRQ pin I ±15 mA
Maximum current for pins PTA0PTA5 IPTA0-IPTA5 ±25 mA
Storage temperature TSTG 55 to +150 °C
Maximum current out of VSS IMVSS 100 mA
Maximum current into VDD IMVDD 100 mA

MC68HC908QY4A Features

• High-performance M68HC08 CPU core
• Fully upward-compatible object code with M68HC05 Family
• 5-V and 3-V operating voltages (VDD)
• 8-MHz internal bus operation at 5 V, 4-MHz at 3 V
• Trimmable internal oscillator
Software selectable 1 MHz, 2 MHz, or 3.2 MHz internal bus operation
8-bit trim capability
±25% untrimmed
Trimmable to approximately 0.4%(1)
• Software selectable crystal oscillator range, 32100 kHz, 18 MHz and 832 MHz
• Software configurable input clock from either internal or external source
• Auto wakeup from STOP capability using dedicated internal 32-kHz RC or bus clock source
• On-chip in-application programmable FLASH memory
Internal program/erase voltage generation
Monitor ROM containing user callable program/erase routines
FLASH security(2)
• On-chip random-access memory (RAM)
• 2-channel, 16-bit timer interface (TIM) module
• 6-channel, 10-bit analog-to-digital converter (ADC) with internal bandgap reference channel (ADC10)
• Up to 13 bidirectional input/output (I/O) lines and one input only:
Six shared with KBI
Six shared with ADC
Two shared with TIM
One input only shared with IRQ
High current sink/source capability on all port pins
Selectable pullups on all ports, selectable on an individual bit basis
Three-state ability on all port pins
• 6-bit keyboard interrupt with wakeup feature (KBI)
Programmable for rising/falling or high/low level detect
• Low-voltage inhibit (LVI) module features:
Software selectable trip point
• System protection features:
Computer operating properly (COP) watchdog
Low-voltage detection with reset
Illegal opcode detection with reset
Illegal address detection with reset
• External asynchronous interrupt pin with internal pullup (IRQ) shared with general-purpose input pin
• Master asynchronous reset pin with internal pullup (RST) shared with general-purpose input/output (I/O) pin
• Memory mapped I/O registers
• Power saving stop and wait modes
• MC68HC908QY4A, MC68HC908QY2A and MC68HC908QY1A are available in these packages:
16-pin plastic dual in-line package (PDIP)
16-pin small outline integrated circuit (SOIC) package
16-pin thin shrink small outline packages (TSSOP)
• MC68HC908QT4A, MC68HC908QT2A and MC68HC908QT1A are available in these packages:
8-pin PDIP
8-pin SOIC
8-pin dual flat no lead (DFN) package
Features of the CPU08 include the following:
• Enhanced HC05 programming model
• Extensive loop control functions
• 16 addressing modes (eight more than the HC05)
• 16-bit index register and stack pointer
• Memory-to-memory data transfers
• Fast 8 * 8 multiply instruction
• Fast 16/8 divide instruction
• Binary-coded decimal (BCD) instructions
• Optimization for controller applications
• Efficient C language support

MC68HC908QY4A datasheet

MC68HC908QY4A
PDF/DataSheet Download

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