MN673744(HL)

· Improved processing precision of both 2D and 3D Y/C separation : 9 bits
· A single clock fixed at 27 MHz is used from the A/D conversion to Rec.656 output stages.
· A time base corrector (TBC) with a function of velocity error correction is provided to ensure the correct time axis on the whole screen.
· A frame synchronizer is provided to convert all input signals into standard signals perfectly.
· It requires a single SDRAM (capacity: 16-Mbit; clock frequency: 108 MHz) externally.

· Disc recorders with hard discs or DVDs employed, screen displays such as TV and PDP units, and PCs with AV functions.