MFG:MIT Package Cooled:PLCC D/C:02+
MFG: MIT
Package Cooled: PLCC
D/C: 02+
Description: The MT8952B HDLC Protocol Controller frames and formats data packets according to X.25 (Level 2) Recom...
The MT8952B HDLC Protocol Controller frames and formats data packets according to X.25 (Level 2) Recommendations from the CCITT.
|
|
Parameter |
Symbol |
Min |
Max |
Units |
|
1 |
Supply voltage |
VDD |
-0.3 |
7.0 |
V |
|
2 |
2 Voltage on any pin (other than supply pins) |
VI |
VSS-0.3 |
VDD+0.3 |
V |
|
3 |
Current on any pin (other than supply pins) |
II / IO |
|
±25 |
mA |
|
4 |
DC Supply or ground current |
IDD / ISS |
|
±50 |
mA |
|
5 |
Storage temperature |
TST |
-65 |
150 |
°C |
|
6 |
Package power dissipation Cerdip Plastic |
PD PD |
|
1.0 0.6 |
W W |
MT8952B
PDF/DataSheet Download
The MT8950 is a coder/decoder which uses the Transition Encoded Modulation (TEM) technique for encoding/decoding low speed data to and from a 56/64 kbps channel (equivalent to PCM Voice). The coding and decoding scheme of MT8950 is tr-ansparent and can accep...
The MT8941BP is a dual digital phase-locked loop providing the timing and synchronization signals for the T1 or CEPT transmission links and the ST-BUS.The first PLL provides the T1 clock (1.544 MHz) synchronized to the input frame pulse at 8 kHz. The t...
The MT8941B is a dual digital phase-locked loop providing the timing and synchronization signals for the T1 or CEPT transmission links and the ST-BUS. The first PLL provides the T1 clock (1.544 MHz) synchronized to the input frame pulse at 8 kHz. The t...
The MT8940AE is a kind of dual digital phase-locked loop which provides the timing and synchronization signals for the T1 or CEPT transmission links and the ST-BUS. The first PLL provides the T1 clock (1.544 MHz),synchronized to the input frame pulse at 8 kH...
The MT8940AC is a kind of dual digital phase-locked loop which provides the timing and synchronization signals for the T1 or CEPT transmission links and the ST-BUS. The first PLL of MT8940AC provides the T1 clock (1.544 MHz),synchronized to the input frame p...
The MT8940 is a dual digital phase-locked loopproviding the timing and synchronization signals for the T1 or CEPT transmission links and the ST-BUS. The first PLL provides the T1 clock (1.544 MHz) synchronized to the input frame pulse at 8 kHz. The tim...
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