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MFG:ONS  Package Cooled:D2PAK  D/C:09+  

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Part Number: MTB50P03HDL

 

MFG: ONS

Package Cooled: D2PAK

D/C: 09+

Description: The D2PAK package has the capability of housing a larger die than any existing surface moun...


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MTB50P03HDL General Description


The D2PAK package has the capability of housing a larger die than any existing surface mount package which allows it to be used in applications that require the use of surface mount components with higher power and lower RDS(on) capabilities. This advanced highcell density HDTMOS power FET is designed to withstand high energy in the avalanche and commutation modes. This new energy efficient design also offers a draintosource diode with a fast recovery time. Designed for low voltage, high speed switching applications in power supplies, converters and PWM motor controls, these devices are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional safety margin against unexpected voltage transients.

MTB50P03HDL Maximum Ratings

Rating
Symbol
Value
Unit
DraintoSource Voltage
VDSS
30
Vdc
DraintoGate Voltage (RGS = 1.0 M)
VDGR
30
Vdc
GatetoSource Voltage - Continuous
- NonRepetitive (tp 10 ms)
VGS
VGSM
±15
± 20
Vdc
Vpk
Drain Current - Continuous
- Continuous @ 100
- Single Pulse (tp 10 s)
ID
ID
IDM
50
31
150
Adc
Apk
Total Power Dissipation
Derate above 25
Total Power Dissipation @ TC = 25, when mounted with the minimum recommended pad size
PD
125
1.0
2.5
Watts
W/
Watts
Operating and Storage Temperature Range
TJ, Tstg
55 to 150
Single Pulse DraintoSource Avalanche Energy - Starting TJ = 25
(VDD = 25 Vdc, VGS = 5.0 Vdc, Peak IL = 50 Apk, L = 1.0 mH, RG = 25 )
EAS
1250
mJ
Thermal Resistance - Junction to Case
- Junction to Ambient
- Junction to Ambient, when mounted with the minimum recommended pad size
RJC
RJA
RJA
1.0
62.5
50
/W
Maximum Lead Temperature for Soldering Purposes, 1/8"from case for 10 seconds
TL
260

Designer's Data for "Worst Case" Conditions - The Designer's Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit curves - representing boundaries on device characteristics - are given to facilitate "worst case" design.

Designer's, EFET, and HDTMOS are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.

Thermal Clad is a trademark of the Bergquist Company.

Preferred devices are Motorola recommended choices for future use and best overall value.

MTB50P03HDL Features

• Avalanche Energy Specified
• SourcetoDrain Diode Recovery Time Comparable to a Discrete Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
• IDSS and VDS(on) Specified at Elevated Temperature
• Short Heatsink Tab Manufactured - Not Sheared
• Specially Designed Leadframe for Maximum Power Dissipation
• Available in 24 mm 13inch/800 Unit Tape & Reel, Add T4 Suffix to Part Number

MTB50P03HDL datasheet

MTB50P03HDL
PDF/DataSheet Download

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