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Description: The MX29L8100T/B is a 8 Mbit, 3 V-only Flash memory organized as a either 1 Mbytesx8 or 512K word x16....


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MX29L8100T General Description


The MX29L8100T/B is a 8 Mbit, 3 V-only Flash memory organized as a either 1 Mbytesx8 or 512K word x16. For flexible erase and program capability, the 8 Mbits of data is divided into 11 sectors of one 16 Kbyte protected block,two 8 Kbyte parameter blocks, one 96 Kbyte main block,and seven 128 Kbyte main blocks. To allow for simple insystem operation, the device can be operated with a single 2.7 V to 3.6 V supply voltage. Since many designs read from the flash memory a large percentage of the time,significant power saving is achieved with the 2.7 V VCC operation. Manufactured with MXIC's advanced nonvolatile memory technology, the device offers access times of 120 ns, and a low 1uA typical deep power-down current.

The MX29L8100T/B command set is compatible with the JEDEC single-power-supply flash standard. Commands are written to the command register using standard microprocessor write timings. MXIC's flash memory augments EPROM functionality with an internal state machine which controls the erase and program circuitry. The device Status Register provides a convenient way to monitor when a program or erase cycle is complete, and the success or failure of that cycle.

Programming the MX29L8100T/B is performed on a page basis; 128 bytes of data are loaded into the device and then programmed simultaneously. The typical Page Program time is 5ms.The device can also be reprogrammed in standard EPROM programmers. Reading data out of the device is similar to reading from an EPROM or other flash.

Erase is accomplished by executing the Erase command sequence. This will invoke the Auto Erase algorithm which is an internal algorithm that automatically times the erase pulse widths and verifies proper cell margin. This device features both chip erase and block erase. Each block can be erased and programmed without affecting other blocks. Using MXIC's advanced design technology, no preprogram is required (internally or externally). As a result, the whole chip can be typically erased and verified in as fast as 50 ms.

MX29L8100T Maximum Ratings

RATING

VALUE

Ambient Temperature -40°C to 85°C
Storage Temperature

-65°C to 125°C

Applied Input Voltage

-0.5V to VCC + 4.5

Applied Output Voltage -0.5V to VCC + 0.6
VCC to Ground Potential -0.5V to 5.5V
A9,WP

-0.5V to 13.0V

MX29L8100T Features

• Extended single-supply voltage range 2.7V to 3.6V for read and write
• JEDEC-standard EEPROM commands
• Endurance 100,000 cycles
• Fast access time: 120ns
• Optimized block architecture
- One 16 Kbyte protected block(16K-block)
- Two 8 Kbyte parameter blocks
- One 96 Kbyte main block
- Seven 128 Kbyte main blocks
• Hardware and software data protection
- Hardware Write Protection pin (WP)
- Hardware Lockout bit for 16K-block
- Software command data protection
• Software EEPROM emulation with parameter blocks
• Status register
- For detection of program or erase cycle completion
• Auto Erase operation
- Automatically erases any one of the sectors or the whole chip
- Erase suspend capability
- Fast erase time: 50ms typical for chip erase
• Auto Page Program operation
- Automatically programs and verifies data at specified addresses
- Internal address and data latches for 128 bytes per page
• Low power dissipation
- 20mA active current
- 20uA standby current
- 1uA deep power-down current
• Hardware Reset pin (RP)
- Reset internal state machine, and put the device into deep power-down mode
• Built-in 128 Bytes/64 words Page Buffer
- Work as SRAM for temporary data storage
- Fast access to temporary data
• Low Vcc write inhibit £1.8V
• Industry standard surface mount packaging
- 48-Lead TSOP Type I
- 48-Lead CSP (9mm x 11mm)
- Ball pitch : 0.75mm/0.8mm/1.0mm

MX29L8100T Connection Diagram

MX29L8100T  Connection Diagram

MX29L8100T datasheet

MX29L8100T
PDF/DataSheet Download

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