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Part Number: MX29SL800CT
Description: The MX29SL800C T/B is a 8-mega bit Flash memory organized as 1M bytes of 8 bits or 512K words of 16 bi...
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MX29SL800CT
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General Description
MX29SL800CT General Description
The MX29SL800C T/B is a 8-mega bit Flash memory organized as 1M bytes of 8 bits or 512K words of 16 bits.
MXIC's Flash memories offer the most cost-effective and reliable read/write non-volatile random access memory.
The MX29SL800C T/B is packaged in 48-pin TSOP and 48-ball CSP. It is designed to be reprogrammed and erased in system or in standard EPROM programmers.
The standard MX29SL800C T/B offers access time as fast as 90ns, allowing operation of high-speed microprocessors without wait states. To eliminate bus contention, the MX29SL800C T/B has separate chip enable (CE#) and output enable (OE#) controls.
MXIC's Flash memories augment EPROM functionality with in-circuit electrical erasure and programming. The MX29SL800C T/B uses a command register to manage this functionality. The command register allows for 100% TTL level control inputs and fixed power supply levels during erase and programming, while maintaining maximum EPROM compatibility.
MXIC Flash technology reliably stores memory contents even after 100,000 erase and program cycles. The MXIC cell is designed to optimize the erase and programming mechanisms. In addition, the combination of advanced tunnel oxide processing and low internal electric fields for erase and program operations produces reliable cycling. The MX29SL800C T/B uses a 1.65V~2.2V VCC supply to perform the High Reliability Erase and auto Program/Erase algorithms.
The highest degree of latch-up protection is achieved with MXIC's proprietary non-epi process. Latch-up protection is proved for stresses up to 100 milliamperes on address and data pin from -1V to VCC + 1V.
MX29SL800CT Maximum Ratings
Storage Temperature
Plastic Packages . . . . . . . . . . . . . ..... -55 to +125
Ambient Temperature
with Power Applied. . . . . . . . . . . . . .... -40to +85
Voltage with Respect to Ground
VCC (Note 1) . . . . . . . . . . . . . . . . . -0.5 V to +3.0 V
A9, OE#, and
RESET# (Note 2) . . . . . . . . . . . ....-0.3 V to +11.5 V
All other pins (Note 1) . . . . . . . -0.3 V to VCC +0.5 V
Output Short Circuit Current (Note 3) . . . . . . 200 mA
Notes:
1. Minimum DC voltage on input or I/O pins is -0.3 V.
During voltage transitions, input or I/O pins may overshoot VSS to -2.0 V for periods of up to 20 ns. See Figure 6. Maximum DC voltage on input or I/O pins is VCC +0.5 V. During voltage transitions, input or I/O pins may overshoot to VCC +2.0 V for periods up to 20 ns.
2. Minimum DC input voltage on pins A9, OE#, and RESET# is -0.3V. During voltage transitions, A9, OE#, and RESET# may overshoot VSS to -2.0 V for periods of up to 20 ns. See Figure 6. Maximum DC input voltage on pin A9 is +11.5 V which may overshoot to 12.5 V for periods up to 20 ns.
3. No more than one output may be shorted to ground at a time. Duration of the short circuit should not be greater than one second.
Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device.
This is a stress rating only; functional operation of the device at these or any other conditions above those indicated
in the operational sections of this data sheet is not implied. Exposure of the device to absolute maximum rating conditions for extended periods may affect device reliability.
MX29SL800CT Features
• Extended single - supply voltage range 1.65V to 2.2V
• 1,048,576 x 8/524,288 x 16 switchable
• Single power supply operation
- 1.8V only operation for read, erase and program
operation
• Fast access time: 90ns
• Low power consumption
- 12mA maximum active current (10MHz)
- 1uA typical standby current
• Command register architecture
- Byte/word Programming (12us/18us typical)
- Sector Erase (Sector structure 16K-Bytex1,
8K-Bytex2, 32K-Bytex1, and 64K-Byte x15)
• Auto Erase (chip & sector) and Auto Program
- Automatically erase any combination of sectors with
Erase Suspend capability.
- Automatically program and verify data at specified
address
• Erase suspend/Erase Resume
- Suspends sector erase operation to read data from,
or program data to, any sector that is not being erased,
then resumes the erase
• Status Reply
- Data# polling & Toggle bit for detection of program
and erase operation completion
• Ready/Busy# pin (RY/BY#)
- Provides a hardware method of detecting program or
erase operation completion
• Hardware reset pin (RESET#)
- Hardware method to reset the device to reading array
data
• Sector protection
- Hardware method to disable any combination of
sectors from program or erase operations
- Temporary sector unprotected allows code changes
in previously locked sectors
• CFI (Common Flash Interface) compliant
- Flash device parameters stored on the device and
provide the host system to access
• 100,000 minimum erase/program cycles
• Latch-up protected to 100mA from -1V to VCC+1V
• Boot Sector Architecture
- T = Top Boot Sector
- B = Bottom Boot Sector
• Package type:
- 48-pin TSOP
- 48-ball CSP
- All Pb-free devices are RoHS Compliant
• Compatibility with JEDEC standard
- Pinout and software compatible with single-power
supply Flash
• 10 years data retention
• 1,048,576 x 8/524,288 x 16 switchable
• Single power supply operation
- 1.8V only operation for read, erase and program
operation
• Fast access time: 90ns
• Low power consumption
- 12mA maximum active current (10MHz)
- 1uA typical standby current
• Command register architecture
- Byte/word Programming (12us/18us typical)
- Sector Erase (Sector structure 16K-Bytex1,
8K-Bytex2, 32K-Bytex1, and 64K-Byte x15)
• Auto Erase (chip & sector) and Auto Program
- Automatically erase any combination of sectors with
Erase Suspend capability.
- Automatically program and verify data at specified
address
• Erase suspend/Erase Resume
- Suspends sector erase operation to read data from,
or program data to, any sector that is not being erased,
then resumes the erase
• Status Reply
- Data# polling & Toggle bit for detection of program
and erase operation completion
• Ready/Busy# pin (RY/BY#)
- Provides a hardware method of detecting program or
erase operation completion
• Hardware reset pin (RESET#)
- Hardware method to reset the device to reading array
data
• Sector protection
- Hardware method to disable any combination of
sectors from program or erase operations
- Temporary sector unprotected allows code changes
in previously locked sectors
• CFI (Common Flash Interface) compliant
- Flash device parameters stored on the device and
provide the host system to access
• 100,000 minimum erase/program cycles
• Latch-up protected to 100mA from -1V to VCC+1V
• Boot Sector Architecture
- T = Top Boot Sector
- B = Bottom Boot Sector
• Package type:
- 48-pin TSOP
- 48-ball CSP
- All Pb-free devices are RoHS Compliant
• Compatibility with JEDEC standard
- Pinout and software compatible with single-power
supply Flash
• 10 years data retention
MX29SL800CT Connection Diagram
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