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Part Number: PLL103-02
Description: The PLL103-02 is designed as a 3.3V/2.5V buffer to distribute high-speed clocks in PC applications. Th...


Description: The PLL103-02 is designed as a 3.3V/2.5V buffer to distribute high-speed clocks in PC applications. Th...
The PLL103-02 is designed as a 3.3V/2.5V buffer to distribute high-speed clocks in PC applications. The device has 24 outputs. These outputs can be configured to support four unbuffered DDR DIMMS or to support 2 unbuffered standard SDRAM DIMMS and 2 DDR DIMMS. The PLL103-02 can be used in conjunction with the PLL202-04 or similar clock synthesizer for the VIA Pro 266 chipset. The PLL103-02 also has an I2C interface, which can enable or disable each output clock. When power up, all output clocks are enabled (has internal pull up).
|
PARAMETERS |
SYMBOL |
MIN. |
MAX. |
UNITS |
| Supply Voltage |
VDD |
VSS-0.5 |
7.0 |
V |
| Input Voltage, dc |
VI |
VSS-0.5 |
VDD+0.5 |
V |
| Output Voltage, dc |
VO |
VSS-0.5 |
VDD+0.5 |
V |
| Storage Temperature |
TS |
-65 |
150 |
|
| Ambient Operating Temperature |
TA |
0 |
70 |
|
| ESD Voltage |
2 |
KV |
PLL103-02
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