SAA7104E

· Digital PAL/NTSC encoder with integrated high quality scaler and anti-flicker filter for TV output from a PC
· Supports Intel® Digital Video Out (DVO) low voltage interfacing to graphics controller
· 27 MHz crystal-stable subcarrier generation
· Maximum graphics pixel clock 85 MHz at double edged clocking, synthesized on-chip or from external source
· Programmable assignment of clock edge to bytes (in double edged mode)
· Synthesizable pixel clock (PIXCLK) with minimized output jitter, can be used as reference clock for the VGC, as well)
· PIXCLK output and bi-phase PIXCLK input (VGC clock loop-through possible)
· Hot-plug detection through dedicated interrupt pin
· Supported VGA resolutions for PAL or NTSC legacy video output up to 1280 × 1024 graphics data at 60 or 50 Hz frame rate
· Supported VGA resolutions for HDTV output up to 1920 × 1080 interlaced graphics data at 60 or 50 Hz frame rate
· Three Digital-to-Analog Converters (DACs) for CVBS (BLUE, CB), VBS (GREEN, CVBS) and C (RED, CR) at 27 MHz sample rate (signals in parenthesis are optionally), all at 10-bit resolution
· Non-interlaced CB-Y-CR or RGB input at maximum 4 : 4 : 4 sampling
· Downscaling and upscaling from 50 to 400%
· Optional interlaced C_B-Y-C_R input of Digital Versatile Disk (DVD) signals
· Optional non-interlaced RGB output to drive second VGA monitor (bypass mode, maximum 85 MHz)
· 3 × 256 bytes RGB Look-Up Table (LUT)
· Support for hardware cursor
· HDTV up to 1920 × 1080 interlaced and 1280 × 720 progressive, including 3-level sync pulses
· Programmable border colour of underscan area
· Programmable 5 line anti-flicker filter
· On-chip 27 MHz crystal oscillator (3rd-harmonic or fundamental 27 MHz crystal)
· Fast I²C-bus control port (400 kHz)
· Encoder can be master or slave
· Adjustable output levels for the DACs
· Programmable horizontal and vertical input synchronization phase
· Programmable horizontal sync output phase
· Internal Colour Bar Generator (CBG)
· Optional support of various Vertical Blanking Interval (VBI) data insertion
· Macrovision^TM(1) Pay-per-View copy protection system rev. 7.01, rev. 6.1 and rev. 1.03 (525p) as option; this applies to the SAA7104E only. The device is protected by USA patent numbers 4631603, 4577216 and 4819098 and other intellectual property rights. Use of the Macrovision anti-copy process in the device is licensed for non-commercial home use only. Reverse engineering or disassembly is prohibited. Please contact your nearest Philips Semiconductors sales office for more information.
· Optional cross-colour reduction for PAL and NTSC CVBS outputs
· Power-save modes
· Joint Test Action Group (JTAG) boundary scan test
· Monolithic CMOS 3.3 V device, 5 V tolerant I/Os.

The SAA7104E; SAA7105E is an advanced next-generation video encoder which converts PC graphics data at maximum 1280 × 1024 resolution (optionally 1920 × 1080 interlaced) to PAL (50 Hz) or NTSC (60 Hz) video signals. A programmable scaler and anti-flicker filter (maximum 5 lines) ensures properly sized and flicker-free TV display as CVBS or S-video output.

Alternatively, the three Digital-to-Analog Converters (DACs)SAA7104E; SAA7105E can output RGB signals together with a TTL composite sync to feed SCART connectors.

When the scaler/interlacer is bypassed, a second VGA monitor can be connected to the RGB outputs and separate H and V-syncs as well, thereby serving as an auxiliary monitor at maximum 1280 × 1024 resolution/60 Hz (PIXCLK < 85 MHz). Alternatively this port can provide Y, P_B and P_R signals for HDTV monitors.

The SAA7104E; SAA7105E include a sync/clock generator and on-chip DACs.

All inputs of SAA7104E; SAA7105E intended to interface to the host graphics controller are designed for low-voltage signals between down to 1.1 V and up to 3.6 V.