Features: · Clock generation suitable for digital TV systems (line-locked)· PLL frequency multiplier to generate 4 times of input frequency· Dividers to generate clocks LL1.5A, LL1.5B, LL3A and LL3B (4th and 2nd multiples of input frequency)· PLL mode or VCO mode selectable· Reset control and powe...
SAA7157: Features: · Clock generation suitable for digital TV systems (line-locked)· PLL frequency multiplier to generate 4 times of input frequency· Dividers to generate clocks LL1.5A, LL1.5B, LL3A and LL3B...
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| SYMBOL | PARAMETER | MIN. | MAX. | UNIT |
| VDDA | analog supply voltage (pin 5) | -0.5 | 7.0 | V |
| VDDD | digital supply voltage (pins 8 and 17) | -0.5 | 7.0 | V |
| Vdiff GND | difference voltage VDDA - VDDD | - | ±100 | mV |
| VO | output voltage (IOM = 20 mA) | -0.5 | VDDD | V |
| Ptot | total power dissipation (DIL20) | 0 | 1.1 | mV |
| Tstg | storage temperature | - 65 | 150 | °C |
| Tamb | operating ambient temperature | 0 | 70 | °C |
| VESD | electrostatic handling(1) for all pins | - | tbf | V |
The SAA7157 generates all clock signals required for a digital TV system suitable for the SAA715x family and the SAA7199B (DENC). The circuit operates in either the phase-locked loop mode (PLL) or voltage controlled oscillator mode (VCO).