SAA7196

The CMOS circuit SAA7196, digital video decoder, scaler and clock generator (DESCPro), is a highly integrated circuit for DeskTop Video applications. SAA7196 combines the functions of a digital multistandard decoder (SAA7191B), a digital video scaler (SAA7186) and a clock generator (SAA7197).

The decoder is based on the principle of line-locked clock decoding. SAA7196 runs at square-pixel frequencies to achieve correct aspect ratio. Monitor controls are provided to ensure best display.

Four data ports of SAA7196 are supported:
· Port CVBS7 to CVBS0 of input interface; used in Y/C mode (see Fig.1) to decode digitized luminance and chrominance signals (digitized in two external ADCs). In normal mode, only this input port is used and only one ADC is necessary (see Fig.4)
· Port CHR7 to CHR0 of input interface; used in Y/C mode (see Fig.1) to decode digitized luminance and chrominance signals (digitized in two external ADCs)
· 32-bit VRAM output port; interface to the video memory. It outputs the down-scaled video data; different formats and operation modes are supported by this circuit
· 16-bit expansion port; this is a bidirectional port.

In general, SAA7196 establishes the digital YUV as known from the SAA71x1 family of digital decoders. In addition, the expansion port is configurable to send data from the decoder unit or to accept external data for input into the scaler. In input mode the clock rate and/or the sync signals may be delivered by the external data source. Decoder and scaler units can run at different clock rates.

The decoder processing always operates with a Line Locked Clock (LLC). This clock is derived from the CVBS signal and is suited best for memory based video processing; the LLC clock is always present. The scaler clock of SAA7196 may be driven by the LLC clock or by an external clock depending on the configuration of the expansion port.