Features: • 8-Bit amplitude resolution of each input componentInput sample frequency up to 30 MHzApplication in flicker reduction systems possible• Four input data formats4:1:1 luminance and chrominance parallel (8 + 4 wires)4:2:2 CCIR 656-format (8 wires)4:2:2 luminance and chrominanc...
SDA9280: Features: • 8-Bit amplitude resolution of each input componentInput sample frequency up to 30 MHzApplication in flicker reduction systems possible• Four input data formats4:1:1 luminance...
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• 8-Bit amplitude resolution of each input component
Input sample frequency up to 30 MHz
Application in flicker reduction systems possible
• Four input data formats
4:1:1 luminance and chrominance parallel (8 + 4 wires)
4:2:2 CCIR 656-format (8 wires)
4:2:2 luminance and chrominance parallel (2 x 8 wires)
4:4:4 all components parallel (3 x 8 wires)
• Two different representations of input data
Positive dual code
2's complement code
• Three D/A converters on-chip
9-Bit amplitude resolution
80 MHz maximal clock frequency
• DCTI (digital color transient improvement)
A digital algorithm improves the sharpness of vertical color edges avoiding the artifacts of analog CTI-circuits
• Luminance peaking
Separate programmable lowpass, bandpass, and highpass digital filters
• High performance digital interpolation for anti-imaging
Two-fold oversampling
Simplification of external analog postfiltering
• 16:9 compatibility
Signal compression for displaying 4:3-signals on16:9-screens
Signal expansion for displaying 16:9-signals on 4:3-screens
Full screen display of 4:3 letter box pictures
• Programmable delay for the luminance signal
Phase adjustment between luminance and chrominance signals
• Signal manipulations
Inverted display
Graphic display
• Insertion of colored areas
Programmable color and position
• Insertion of an arbitrary pattern
Control by an external signal
One of 4096 colors programmable
Frame insertion for multi picture display
• N-Fold zoom facility for image memory systems
• Programmable internal PLL for clock generation
Control of compression and expansion factors
• I2C-Bus control
• P-LCC-68-1 package
• 5 V supply voltage

| Parameter | Symbol | Limit Values | Unit | Remark | |
| min. | max. | ||||
| Operating temperature | TA | 0 | 70 | °C | |
| Storage temperature | Tstg | - 65 | 125 | °C | |
| Junction temperature | Tj | 125 | °C | ||
| Soldering temperature | TS | 260 | °C | ||
| Soldering time | 10 | s | |||
| Input voltage | VI | - 0.3 V | VDD + 0.3 V | 1 | VCC respectively |
| Output voltage | VQ | - 0.3 V | VDD + 0.3 V | 1 | VCC respectively |
| Supply voltages | VDD | - 0.3 | 6 | V | |
| Supply voltage Differentials |
V | - 0.25 | 0.25 | V | between any internally nonconnected supply pins of the same kind, see Pin Description |
| DAC output current | -30 | mA | For any single output | ||
| RREF output current | -30 | mA | For any single output | ||
| Total power dissipation | Ptot | 1 | W | ||
| ESD protection | - 2 | - 2 | kV | MIL STD 883C method 3015.6, 100 pF, 1500 Except: Pin 36 (SDA) ±300 V | |
| Latch-up protection | - 100 | 100 | mA | all inputs/outputs | |
The Display Processor SDA 9280 is an integrated triple 9 Bit D/A converter which performs digital enhancements and manipulations of digital video component signals. Multiple input data formats are accepted. Operation with normal as well as doubled horizontal deflection frequency of SDA 9280 is supported. 4:3 or 16:9 display formats are possible.