SDA9362

Features: • Deflection - Protection - 16:9 / 4:3• I2C Bus alignment of all deflection parameters• All EW-, V- and H-functions (incl. 2)• PW EHT compensation• PH EHT compensation• Compensation of H-phase deviation (e.g. caused by white bar)• Upper/lower EW-...

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SDA9362 Picture
SeekIC No. : 004486912 Detail

SDA9362: Features: • Deflection - Protection - 16:9 / 4:3• I2C Bus alignment of all deflection parameters• All EW-, V- and H-functions (incl. 2)• PW EHT compensation• PH EHT com...

floor Price/Ceiling Price

Part Number:
SDA9362
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/12/26

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Product Details

Description



Features:

• Deflection - Protection - 16:9 / 4:3
• I2C Bus alignment of all deflection parameters
• All EW-, V- and H-functions (incl. 2)
• PW EHT compensation
• PH EHT compensation
• Compensation of H-phase deviation (e.g. caused by white bar)
• Upper/lower EW-corner correction separately adjustable
• V-angle correction: Vertical frequent linear modulation of H-phase
• V-bow correction: Vertical frequent parabolic modulation of H-phase
• Three reduced V-scan modes (75 %, 66 %, 50 % V-size) selectable
• H- and V-blanking time adjustable
• Partial overscan adjustable to hide the cut off control measuring lines in the reduced scan modes
• Stop/start of vertical deflection adjustable to fill out the 16/9 screen with different letterbox formats without    annoying overscan
• Dynamic PH EHT-compensation (white bar)
• Self adaptation of V-frequency/number of lines per field between 192 and 680 for each possible line frequency
• Protection against EHT run away (X-rays protection)
• Protection against missing V-deflection (CRT-protection)
• Two digital outputs for general purpose, controlled by I2C Bus
• Selectable softstart of the H-output stage
• P-MQFP-44-2 package
• 5 V supply voltage




Pinout

  Connection Diagram


Specifications

Parameter Symbol Limit Values Unit Remark
min. max.
Operating temperature TA -20 70 °C  
Storage temperature Tstg -40 125 °C  
Junction temperature Tj   125 °C  
Soldering temperature Ts   260 °C  
Input voltage VI VSS - 0.3 V VDD + 0.3 V    
Output voltage VQ VSS - 0.3 V VDD + 0.3 V    
Supply voltages VDD - 0.3 6 V  
Supply voltage
Differentials
  - 0.25 0.25 V 1)
Total power dissipation Ptot   0.85 W  
Latch-Up Protection   -100 100 mA All inputs/outputs



Description

The SDA 9362 is a highly integrated deflection controller for CTV receivers with doubled line and standard or doubled field frequencies. It controls among others an horizontal driver circuit for a flyback line output stage, a DC coupled vertical sawtooth output stage and an East-West raster correction circuit. All adjustable output parameters are I2C Bus controlled. Inputs of SDA 9362 are HSYNC, VSYNC and the line locked clock CLL.




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