Features: • No external clock needed• 1PLL and2PLL on chip• Standard line frequencies for NTSC and PAL• 18.75kHz line frequency for 625 lines/60 Hz• Doubled line frequencies for NTSC and PAL, MUSE standard, DTV standard• Also suitable for VGA, Macintosh (35kHz) ...
SDA9380-B21: Features: • No external clock needed• 1PLL and2PLL on chip• Standard line frequencies for NTSC and PAL• 18.75kHz line frequency for 625 lines/60 Hz• Doubled line freque...
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• No external clock needed
• 1PLL and2PLL on chip
• Standard line frequencies for NTSC and PAL
• 18.75kHz line frequency for 625 lines/60 Hz
• Doubled line frequencies for NTSC and PAL, MUSE standard, DTV standard
• Also suitable for VGA, Macintosh (35kHz) and SVGA standard (38kHz, 800*600*60Hz)
• Automatic switching between 31, 35 and 38kHz in Monitor mode with 2 digital outputs for controlling B+ and 1 analog input to keep watch on it
• I²C-Bus alignment of all deflection parameters
• All EW-, V- and H- functions
• Picture width and picture height EHT compensation
• Dynamic PH EHT compensation (white bar)
• Compensation of H-phase deviation (e.g. caused by white bar)
• Upper/lower EW-corner correction separately adjustable
• Extreme EW-corner correction (coefficient of sixth order) for super flat tubes
• V-angle and V-bow correction
• Two special control items for vertical zoom/shrink and scroll function with absolutely correct tracking of the E/W and HD-output signals
• No re-adjustment of E/W after changing vertical S-correction and linearity needed
• H-frequent PWM output signal for generating an adjustable vertical frequent parabola or a constant pulse width, selectable by I²C
• H- and V-blanking time adjustable
• Partial overscan adjustable to hide the cut off control measuring lines in the reduced scan modes
• Self adaptation of V-frequency / number of lines per field between 192 and 680 for each possible line frequency
• Selectable Black Switch-Off behaviour via I²C-Bus
• Protection against EHT run away (X-rays protection)
• Protection against missing V-deflection (CRT-protection)
• D/A ouput with 8 bit resolution for general purpose
• Digital output for general purpose, controlled by I2C-Bus
• Selectable softstart of the H-output stage
• Two universal YUV/RGB inputs and one RGB input, one YUV/RGB and RGB input with fast blanking capability
• One fast blank input with contrast reduction capability
• Switchable color difference matrix for PAL/SECAM, NTSC(U.S.), NTSC(Japan) and HDTV
• Common saturation, brightness and contrast control for all three input channels possible
• Cut off and white level control loop
• Halt command for white level control loop to switch off the white level reference lines in vertical shrink mode
• Black stretching of non-standard input signals
• Selectable blue stretch circuit shifting white towards light blue
• Peak drive limiter with soft clipping, adjustable per I²C
• Average beam current limiter, adjustable per I²C
• Luminance output signal SVM for scan velocity modulation; adjustable delay from SVM to the RGB outputs

|
Parameter |
Symbol |
Min |
Max |
Unit |
Remark |
| Operating temperature |
TA |
0 |
70 |
°C |
|
| Storage temperature |
-40 |
125 |
°C |
||
| Junction temperature |
125 |
°C |
|||
| Soldering temperature |
260 |
°C |
|||
| Input voltage |
VSS-0.3V |
VDD+0.3V |
not valid for SDA, SCL, CLKI, HD | ||
| Input voltage |
VSS-0.3V |
5.5V |
SDA, SCL, CLKI, HD | ||
| Output voltage |
VSS-0.3V |
VDD+0.3V |
|||
| Supply voltages |
VDD(D) VDD(A1..4) |
-0.3 |
3.8 |
V |
|
| Supply voltage |
VDD(MC) |
-0.3 |
9 |
V |
|
| Supply total voltage difference |
-0.25 |
0.25 |
V |
between VDD(D), VDD(A1..4) | |
| VSS, SUBST total voltage difference |
-0.25 |
0.25 |
V |
between SUBST, VSS(MC), VSS(D), VSS(A1..4) | |
| Total power dissipation |
1.28 |
W |
|||
| Latch-up protection |
-100 |
100 |
mA |
all inputs/outputs |
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions or at any other condition beyond those indicated in the operational sections of this specification is not implied.
The SDA 9380 is a highly integrated deflection controller and RGB video processor for CTV receivers with 15 to 19kHz or 31 to 38kHz line frequencies. The deflection component controls among others an horizontal drive2001-01-29r circuit for a flyback line output stage, a DC coupled vertical sawtooth output stage and an East-West raster correction circuit. All adjustable output parameters of SDA 9380 are I²C-Bus controlled. Inputs are HSYNC and VSYNC. The HSYNC signal of SDA 9380 is the reference for the internal clock system which includes the=1=and 2=control loops.
The RGB processor of SDA 9380 has two YUV/RGB inputs and one RGB input. One YUV/RGB input and the RGB input are for SVGA and text/OSD with fast blanking. The RGB output stage of SDA 9380 has two control loops for cut off and white level with halt capability in vertical shrink modes. An overall Y output and an adjustable delay of the RGB outputs related to this signal are suitable for a scan velocity modulation circuit.
The supply voltages of the IC are 3.3V and 8V. SDA 9380 is mounted in a P-MQFP package with 64 pins.