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SDA9401

Features: • Two input data formats- 4:2:2 luminance and chrominance parallel (2 x 8 wires)- ITU-R 656 data format (8 wires)• Two different representations of input chrominance data- 2's complement code- Positive dual code• Flexible input sync controller• Flexible compressio...

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SeekIC No. : 004486917 Detail

SDA9401: Features: • Two input data formats- 4:2:2 luminance and chrominance parallel (2 x 8 wires)- ITU-R 656 data format (8 wires)• Two different representations of input chrominance data- 2's ...

SDA9401 Data Sheet

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Part Number:
SDA9401
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2026/1/19

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Product Details

Description



Features:

• Two input data formats
- 4:2:2 luminance and chrominance parallel (2 x 8 wires)
- ITU-R 656 data format (8 wires)
• Two different representations of input chrominance data
- 2's complement code
- Positive dual code
• Flexible input sync controller
• Flexible compression of the input signal
- Digital vertical compression of the input signal (1.0, 1.25, 1.5, 1.75, 2.0, 3.0, 4.0)
- Digital horizontal compression of the input signal (1.0, 2.0, 4.0)
• Noise reduction
- Motion adaptive spatial and temporal noise reduction (3D-NR)
- Temporal noise reduction for luminance field based
- Temporal noise reduction for chrominance field based
- Separate motion detectors for luminance and chrominance
- Flexible programming of the temporal noise reduction parameters
- Automatic measurement of the noise level (5 bit value, readable by I²C bus)
• TV mode detection by counting line numbers (PAL, NTSC, readable by I²C bus)
• Embedded memory
- 3.2 Mbit embedded DRAM core for field memories
- 128 kbit embedded DRAM core for line memories
• Flexible clock and synchronization concept
- Decoupling of the input and output clock system possible
• Scan rate conversion
- Simple 100/120 Hz interlaced scan conversion (e.g. AABB, AA*B*B)
- Simple progressive scan conversion (e.g. AA*)
• Flexible digital vertical expansion of the output signal (1.0, ... [1/32] ... , 2.0)
• Flexible output sync controller
- Flexible positioning of the output signal
- Flexible programming of the output sync raster
• Signal manipulations
- Insertion of coloured background
- Vertical and/or horizontal windowing with four different speed factors
- Flash generation
- Still field
- Support of split screen applications
- Multiple picture display - Tuner scan (4 and 16 times for 4:3, 12 times for 16:9 tubes)
- Support of multi picture display with PIP or front-end processor with integrated scaler
(e.g. 9 times display of PIP pictures, picture tracking, random pictures,
still-in-moving picture, moving-in-still picture)
• I²C-bus control (400 kHz)
• P-MQFP-64 package
• 3.3 V ± 5% supply voltage


Pinout

Connection Diagram


Specifications

Parameter Symbol Min Max Unit Remark
Operating Temperature TA 0 70 °C  
Storage temperature   -65 125 °C  
Junction temperature     125 °C  
Soldering temperature     260 °C  
Soldering time     10 s  
Input voltage   -0.3 VDD+0.3 V not valid for I²C bus pins
Output voltage   -0.3 VDD+0.3 V not valid for I²C bus pins
Input Voltage   -0.3 5.5 V I²C bus pins only
Output Voltage   -0.3 5.5 V I²C bus pins only
Supply voltages VDD -0.3 3.8 V  
Total Power Dissipation     1 W  
ESD Protection   -2.0 2,0 kV MIL STD 883C method
3015.6, 100pF, 1500(HBM)
ESD
protection		   -1.5 1,5 kV EOS/ESD Assn. Standard
DS 5.3-1993 (CDM)
Latch-up
protection		   100 100 mA all inputs/outputs



Description

The SDA 9401 is a new component of the Micronas MEGAVISION® IC set in a 0.35 µm embedded DRAM technology (field memory embedded). The SDA 9401 is pin compatible to the SDA 9400 (frame memory embedded). The SDA 9401 comprises all main functionalities of a digital featurebox in one monolithic IC.

The SDA 9401 does a simple 100/120 Hz interlaced (50/60 Hz progressive) scan rate conversion. The scan rate converted picture can be vertically expanded. The SDA 9401 has a freerunning mode, therefore features like multiple picture display (e.g. tuner scan) are possible.

The noise reduction of  SDA 9401 is field based. Furthermore separate motion detectors for luminance and chrominance have been implemented. For automatic controlling of the noise reduction parameters a noise measurement algorithm is included, which measures the noise level in the picture or in the blanking period. In addition a spatial noise reduction is implemented, which reduces the noise even in the case of motion. The input signal of  SDA 9401 can be compressed horizontally and vertically with a certain number of factors. Therefore split screen modes are supported too.

Beside these additional functions of  SDA 9401 like coloured background, windowing and flashing are implemented.




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