Features: ·20V/12A,RDS(ON)=40mΩ@VGS=10V·20V/ 7A,RDS(ON)=45mΩ@VGS=4.5V·20V/ 4A,RDS(ON)=50mΩ@VGS=2.5V·20V/ 2A,RDS(ON)=60mΩ@VGS=1.8V·Super high density cell design for extremely low RDS (ON)·Exceptional on-resistance and maximum DC current capability·TO-252-2L package designAp...
SPN2054: Features: ·20V/12A,RDS(ON)=40mΩ@VGS=10V·20V/ 7A,RDS(ON)=45mΩ@VGS=4.5V·20V/ 4A,RDS(ON)=50mΩ@VGS=2.5V·20V/ 2A,RDS(ON)=60mΩ@VGS=1.8V·Super high density cell design for extremely...
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| Parameter | Symbol | Typical | Unit | |
| Drain-Source Voltage | VDSS | 20 | V | |
| Gate Source Voltage | VGSS | ±12 | V | |
| Continuous Drain Current(TJ=150 ) | TA=25 | ID | 12 | A |
| TA=70 | 8 | |||
| Pulsed Drain Current | IDM |
20 | A | |
| Continuous Source Current(Diode Conduction) | IS | 12 | A | |
| Power Dissipation | TA=25 | PD | 40 | W |
| TA=70 | 20 | |||
| Operating Junction Temperature |
TJ | -55/150 | ||
| Storage Temperature Range | TSTG | -55/150 | ||
| Thermal Resistance-Junction to Ambient | RJA | 105 | /W | |
The SPN2054 is the N-Channel logic enhancement mode power field effect transistors are produced using high cell density , DMOS trench technology.
This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application, such as DC/DC converter and Desktop computer power management.
The package SPN2054 is universally preferred for commercial industrial surface mount applications