ST92R195B

Features:

Register File based 8/16 bit Core Architecture
   with RUN, WFI, SLOW and HALT modes
 to +70  Operating Temperature Range
   available
Up to 24 MHz Operation @ 5V±10%
Minimum instruction cycle time: 375ns at
   16 MHz internal clock
4 Mbytes address space
256 Bytes RAMof Register file (accumulators or
   index registers)
1024 Bytes of on-chip static RAM
8K Bytes of TDSRAM (Teletext and Display
   Storage RAM)
80-lead QFP package
23 fully programmable I/O pins
Serial Peripheral Interface
Flexible Clock controller for OSD, Data Slicer
   and Core clocks running from one single low
   frequency external crystal.
Enhanced Display Controller with 26 rows of
   40/80 characters
    Serial and Parallel attributes
    10x10 dot Matrix, 512 ROM characters, defin-
   able by user
    4/3 and 16/9 supported in 50/60Hz and 100/
   120 Hz mode
    Rounding, fringe, double width, double height,
   scrolling, cursor, full background color, half-
   intensity color, translucency and half-tone
   modes
Teletext unit, including Data slicer, Acquisition
   Unit and 8 Kbytes TDSRAM for Data Storage
VPS and Wide Screen Signalling slicer
Integrated Sync Extractor and Sync Controller
14-bit Voltage Synthesis for tuning reference
   voltage
Up to 8 External Interrupts plus 1 non-maskable
   interrupt
8 x 8-bit programmable PWM outputs with 5V
   open-drain or push-pull capability
16-bit Watchdog timer with 8-bit prescaler
One 16-bit standard timer with 8-bit prescaler
4-channel Analog-to-Digital converter; 5-bit
   guaranteed
Rich instruction set and 14-Addressing modes
   Versatile Development Tools, including Assem-
   bler, Linker, C-compiler, Archiver, Source Level
   Debugger and Hardware Emulators with Real-
   Time Operating System available from third par-
   ties


Pinout




Description

The ST92R195B microcontroller is developed and manufactured by STMicroelectronics using a pro- prietary n-well HCMOS process. Its performance derives from the use of a flexible 256-register pro- gramming model for ultra-fast context switching and real-time event response. The intelligent on-chip peripherals offload the ST9 core from I/O and
data management processing tasks allowing criti-cal application tasks to get the maximum use of core resources. The ST92R195B MCU supports low power consumption and low voltage operation for power-efficient and low-cost embedded sys-tems.