STLVDS3486

Features: · MEETS OR EXCEEDS THE REQUIREMENTS OF ANSI TIA/EIA-644 STANDARD· OPERATES WITH A SINGLE 3.3V SUPPLY· DESIGNED FOR SIGNALING RATE UP TO 400Mbps· DIFFERENTIAL INPUT THRESHOLDS ±100mV MAX· TYPICAL PROPAGATION DELAY TIME OF 2.5ns· POWER DISSIPATION 60mW TYPICAL PER RECEIVER AT 200MHz· LOW V...

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SeekIC No. : 004508120 Detail

STLVDS3486: Features: · MEETS OR EXCEEDS THE REQUIREMENTS OF ANSI TIA/EIA-644 STANDARD· OPERATES WITH A SINGLE 3.3V SUPPLY· DESIGNED FOR SIGNALING RATE UP TO 400Mbps· DIFFERENTIAL INPUT THRESHOLDS ±100mV MAX· T...

floor Price/Ceiling Price

Part Number:
STLVDS3486
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/12/24

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Product Details

Description



Features:

· MEETS OR EXCEEDS THE REQUIREMENTS OF ANSI TIA/EIA-644 STANDARD
· OPERATES WITH A SINGLE 3.3V SUPPLY
· DESIGNED FOR SIGNALING RATE UP TO 400Mbps
· DIFFERENTIAL INPUT THRESHOLDS ±100mV MAX
· TYPICAL PROPAGATION DELAY TIME OF 2.5ns
· POWER DISSIPATION 60mW TYPICAL PER RECEIVER AT 200MHz
· LOW VOLATGE TTL (LVTTL) LOGIC OUTPUT LEVELS
· PIN COMPATIBLE WITH THE MC3486 AND SN65LVD3486
· OPEN CIRCUIT FAIL SAFE
· ESD PROTECTION: 7KV RECEIVER PINS
                                  3KV ALL PINS VS GND



Pinout

  Connection Diagram


Specifications

Symbol
Parameter
Value
Unit
VCC
Supply Voltage (Note 1)
-0.5 to 4.6
V
VI
Input Voltage
-0.5 to (VCC + 0.5)
V
VI
Input Voltage (A or B inputs)
-0.5 to 4.6
V
ESD
Human Body Model Pins Receivers
7
KV
All Pins vs GND
3
Tstg
Storage Temperature Range
-65 to +150

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.

Note 1: All voltages except differential I/O bus voltage, are with respect to the network ground terminal.


Description

The STLVDS3486, is a differential line receiver that implements the electrical characteristics of low voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5V differential standard levels (such as TIA/EIA-422B) to reduce the power, increase the switching speeds and allow operations with a 3.3V supply rail. This differential receiver provides a valid logical output state with a 3.3V supply rail. It also provides a valid logical output state with a ±100mV differential input voltage within the input common mode voltage range. The input common mode voltage allows 1V of ground potential difference between two LVDS nodes.

The intended application of this device STLVDS3486 and signalling technique is both point-to-point and multidrop data transmission over controlled impedance media approximately 100. The transmission media may be printed circuit board traces, backplanes or cables. The ultimate rate and distance of data transfer depend upon the attenuation characteristics of the media and noise coupling to the environment.

The STLVDS3486 version is characterized for operation from -40 to 85.




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