U6215B-AFP

The U6215B-AFP has the following features including Low power consumption(typ. 5 V/35 mA);Electrostatic protection according to MIL-STD 883;SO-16 small package;3-Wire Bus mode:4 unidirectional ports(open collector);Lock output(open collector).

The U6215B is programmed via 2-wire IZC bus or 3-wire hus depending on the received data format. The three bus inputs pin 4,5,10 are used as  SDA, SCL and address select inputs in I2C-bus mode or as  data clock and enable inputs in 3-wire bus mode. The data of U6215B-AFP includes the scaling factor SF and switching output information. In I2C-bus mode there are some additional functions available(ADC, bidirectional ports, etc.).A typical application is shown on page 15. All input/output interface circuits are shown on page 14.Some special features which are related to test- and alignment procedures for tuner production are explained in the following bns mode description.When the U6215B is controlled via 2-wire hC-bus format, then data and clock signals arc fed into the SDA and SCL lines respectively. Depending on the LSB of the address byte the U6215B-AFP can either accept new data(write mode: LSB=0)or send data(read mode: LSB=1).The device has one fixed and three programmable I2C-bus addresses. The tables 'hC-BUS WRITE DATA FORMAT' and 'I2C-BUS READ DATA FORMAT' describe the format of the data and show how to select the device address by applying a voltage at pin 10.

When write mode is activated and the correct address byte is received, the SDA line is pulled low by the U6215B-AFP during the acknowledge period, and then also during the acknowledge periods, when additional data bytes are programmed. After the address transmission(first byte),data bytes can be sent to the device.There are four data bytes requested to fully program the device. Once the correct address is received and  acknowledged, the first bit of the following byte determines whether that byte is interpreted as byte 2 or 4;a logic 0 for divider information and a logic 1 for control and port output information. When byte 2 was received the device always expects byte 3 next. Likewise when byte 4 was received, byte 5 is expected.Additional data bytes of U6215B-AFP can be entered without the need to re-address the device until an I2C-bus stop condition is recognised. This allows a smoth frequency sweep for fine tuning AFC purposes. The table'I2C-BUS PULSE DIAGRAM' shows some possible data transfer examples.