V53C806H

Features: 1M x 8-bit organization Fast Page Mode for a sustained data rate of 43 MHzRAS access time: 40, 45, 50, 60 ns Read-Modify-Write,RAS-Only Refresh,CAS-Before-RAS Refresh capability Refresh Interval: 1024 cycle/16 ms Available in 28-pin 400 mil SOJ package Single +5V±10% Power Supply TTL In...

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SeekIC No. : 004539939 Detail

V53C806H: Features: 1M x 8-bit organization Fast Page Mode for a sustained data rate of 43 MHzRAS access time: 40, 45, 50, 60 ns Read-Modify-Write,RAS-Only Refresh,CAS-Before-RAS Refresh capability Refresh I...

floor Price/Ceiling Price

Part Number:
V53C806H
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/29

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Product Details

Description



Features:

1M x 8-bit organization 
Fast Page Mode for a sustained data rate of 43 MHz 
RAS access time: 40, 45, 50, 60 ns 
Read-Modify-Write,RAS-Only Refresh,CAS-Before-RAS Refresh capability 
Refresh Interval: 1024 cycle/16 ms 
Available in 28-pin 400 mil SOJ package 
Single +5V±10% Power Supply 
TTL Interface



Pinout

  Connection Diagram


Specifications

Ambient TemperatureUnder Bias..................................................10°C to +80°C
Storage Temperature (plastic)....................................................55°C to +125°C
Voltage Relative to VSS ................................................................1.0 V to +7.0 V
Data Output Current .................................................................................. 50 mA
Power Dissipation........................................................................................ 1.4 W



Description

The V53C806H is a ultra high speed 1,048,576 x 8 bit CMOS dynamic random access memory. The V53C806H offers a combination of features: Fast Page Mode for high data bandwidth, and Low CMOS standby current.

All inputs and outputs are TTL compatible. Input and output capacitances are significantly lowered to allow increased system performance. Fast Page Mode operation allows random access of up to 1024 x 8 bits within a row with cycle times as fast as 23 ns. Because of static circuitry, the CAS clock is not in the critical timing path. The flow-through column address latches allow address pipelining while relaxing many critical system timing requirements.

The V53C806H is ideally suited for graphics, digital signal processing and high-performance computing systems.




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