V54C3128804VAT

The V54C3128804VAT is a four bank Synchronous DRAM organized as 4 banks x 4Mbit x 8. The V54C3128804VAT achieves high speed data transfer rates up to 143 MHz by employing a chip architecture that prefetches multiple bits and then synchronizes the output data to a system clock

All of the control, address, data input and output circuits are synchronized with the positive edge of an externally supplied clock.Operating the four memory banks in an interleaved fashion allows random access operation to occur at higher rate than is possible with standard DRAMs. A sequential and gapless data rate of up to 143 MHz is possible depending on burst length, CAS latency and speed grade of the V54C3128804VAT device.